UCC5390-Q1
- 5-kVRMS single channel isolated gate driver
- AEC-Q100 qualified for automotive applications
- Temperature grade 1
- HBM ESD classification level H2
- CDM ESD classification level C6
- 12-V UVLO referenced to GND2
- 8-pin DWV (8.5mm creepage) package
- 60-ns (typical) propagation delay
- Small part-to-part skew in propagation delay
- 100-V/ns minimum CMTI
- 10-A minimum peak current
- 3-V to 15-V input supply voltage
- Up to 33-V driver supply voltage
- Negative 5-V handling capability on input pins
- Safety-related certifications:
- 7000-VPK isolation (DWV) per DIN V VDE V 0884-11:2017-01 (planned)
- 5000-VRMS (DWV) isolation rating for 1 minute per UL 1577
- CQC Certification per GB4943.1-2011
- CMOS inputs
- Operating junction temperature: –40°C to +150°C
The UCC5390-Q1 is a single-channel, isolated gate driver with 10-A source and 10-A sink peak current designed to drive MOSFETs, IGBTs, and SiC MOSFETs. The UCC5390-Q1 has its UVLO2 referenced to GND2, which facilitates bipolar supplies and optimizes SiC and IGBT switching behavior and robustness.
The UCC5390-Q1 is available in 8.5 mm SOIC-8 (DWV) package and can support isolation voltage up to 5-kVRMS. The input side is isolated from the output side with SiO2 capacitive isolation technology with longer than 40 years isolation barrier lifetime. With its high drive strength and true UVLO detection, this device is a good fit for driving IGBTs and SiC MOSFETs in applications such as on-board chargers and traction inverters.
Compared to an optocoupler, the UCC5390-Q1 has lower part-to-part skew, lower propagation delay, higher operating temperature, and higher CMTI.
Technical documentation
Type | Title | Date | ||
---|---|---|---|---|
* | Data sheet | UCC5390-Q1 Single-Channel Isolated Gate Driver for SiC/IGBT and Automotive Applications datasheet (Rev. A) | PDF | HTML | 19 Sep 2019 |
Certificate | UCC5310 CQC Certificate of Product Certification | 16 Aug 2023 | ||
Certificate | UL Certification E181974 Vol 4. Sec 7 (Rev. C) | 02 Dec 2022 | ||
Functional safety information | UCC5390-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FMA | PDF | HTML | 16 Mar 2022 | |
Application note | The Use and Benefits of Ferrite Beads in Gate Drive Circuits | PDF | HTML | 16 Dec 2021 | |
Technical article | How to achieve higher system robustness in DC drives, part 3: minimum input pulse | 19 Sep 2018 | ||
Technical article | How to achieve higher system robustness in DC drives, part 2: interlock and deadtime | 30 May 2018 | ||
Technical article | How to achieve higher system robustness in DC drives, part 1: negative voltage | 17 Apr 2018 | ||
Technical article | Why capacitive isolation: a vital building block for sensors in smart cities | 16 Jan 2018 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.
UCC5390ECDWVEVM — UCC5390ECDWV 10-A, 10-A 5-kVRMS Isolated Single-Channel Gate Driver Evaluation Module
PSPICE-FOR-TI — PSpice® for TI design and simulation tool
Package | Pins | Download |
---|---|---|
SOIC (DWV) | 8 | View options |
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