Product details

Number of channels 1 Withstand isolation voltage (VISO) (Vrms) 3000, 5000 Power switch IGBT, MOSFET, SiCFET Peak output current (A) 10 Features Active miller clamp Output VCC/VDD (max) (V) 33 Output VCC/VDD (min) (V) 9.5 Input VCC (min) (V) 3 Input VCC (max) (V) 15 TI functional safety category Functional Safety-Capable Propagation delay time (µs) 0.065 Input threshold CMOS Operating temperature range (°C) -40 to 125 Rating Automotive Bus voltage (max) (V) 990 Fall time (ns) 10 Undervoltage lockout (typ) (V) 8, 12
Number of channels 1 Withstand isolation voltage (VISO) (Vrms) 3000, 5000 Power switch IGBT, MOSFET, SiCFET Peak output current (A) 10 Features Active miller clamp Output VCC/VDD (max) (V) 33 Output VCC/VDD (min) (V) 9.5 Input VCC (min) (V) 3 Input VCC (max) (V) 15 TI functional safety category Functional Safety-Capable Propagation delay time (µs) 0.065 Input threshold CMOS Operating temperature range (°C) -40 to 125 Rating Automotive Bus voltage (max) (V) 990 Fall time (ns) 10 Undervoltage lockout (typ) (V) 8, 12
SOIC (D) 8 29.4 mm² 4.9 x 6 SOIC (DWV) 8 67.275 mm² 5.85 x 11.5
  • 5-kVRMS and 3-kVRMS single-channel isolated gate driver
  • AEC-Q100 qualified for automotive applications
    • Temperature grade 1
    • HBM ESD classification level H2
    • CDM ESD classification level C6
  • Feature options
    • Split outputs, 8-V UVLO (UCC5350SB-Q1)
    • Miller clamp, 12-V UVLO (UCC5350MC-Q1)
  • ±5-A minimum peak current drive strength
  • 3-V to 15-V input supply voltage
  • Up to 33-V driver supply voltage
    • 8-V and 12-V UVLO options
  • 100-V/ns minimum CMTI
  • Negative 5-V handling capability on input pins
  • 100-ns (maximum) propagation delay and <25-ns part-to-part skew
  • 8-pin DWV (8.5mm creepage) and D (4-mm creepage) packages
  • Isolation barrier life > 40 Years
  • Safety-related certifications:
    • 5000-VRMS DWV and 3000-VRMS D isolation rating for 1 minute per UL 1577
  • CMOS inputs
  • Operating junction temperature: –40°C to +150°C
  • 5-kVRMS and 3-kVRMS single-channel isolated gate driver
  • AEC-Q100 qualified for automotive applications
    • Temperature grade 1
    • HBM ESD classification level H2
    • CDM ESD classification level C6
  • Feature options
    • Split outputs, 8-V UVLO (UCC5350SB-Q1)
    • Miller clamp, 12-V UVLO (UCC5350MC-Q1)
  • ±5-A minimum peak current drive strength
  • 3-V to 15-V input supply voltage
  • Up to 33-V driver supply voltage
    • 8-V and 12-V UVLO options
  • 100-V/ns minimum CMTI
  • Negative 5-V handling capability on input pins
  • 100-ns (maximum) propagation delay and <25-ns part-to-part skew
  • 8-pin DWV (8.5mm creepage) and D (4-mm creepage) packages
  • Isolation barrier life > 40 Years
  • Safety-related certifications:
    • 5000-VRMS DWV and 3000-VRMS D isolation rating for 1 minute per UL 1577
  • CMOS inputs
  • Operating junction temperature: –40°C to +150°C

The UCC5350-Q1 is a single-channel, isolated gate driver with 5-A source and 5-A sink minimum peak current designed to drive MOSFETs, IGBTs, and SiC MOSFETs. The UCC5350-Q1 has the option for Miller clamp or Split Outputs. The CLAMP pin is used to connect the transistor gate to an internal FET besides the output to prevent false turn-on caused by Miller current. The split outputs option allows separate control of the rise and fall times of the gate voltage with OUTH and OUTL pins.

The UCC5350-Q1 is a single-channel, isolated gate driver with 5-A source and 5-A sink minimum peak current designed to drive MOSFETs, IGBTs, and SiC MOSFETs. The UCC5350-Q1 has the option for Miller clamp or Split Outputs. The CLAMP pin is used to connect the transistor gate to an internal FET besides the output to prevent false turn-on caused by Miller current. The split outputs option allows separate control of the rise and fall times of the gate voltage with OUTH and OUTL pins.

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Technical documentation

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* Data sheet UCC5350-Q1 Single-Channel Isolated Gate Driver for SiC/IGBT and Automotive Applications datasheet (Rev. D) PDF | HTML 25 Aug 2022
Functional safety information UCC5390-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FMA PDF | HTML 16 Mar 2022
Technical article Increasing power density with an integrated GaN solution 14 Mar 2022
Application note The Use and Benefits of Ferrite Beads in Gate Drive Circuits PDF | HTML 16 Dec 2021
Technical article How to achieve higher system robustness in DC drives, part 3: minimum input pulse 19 Sep 2018
Technical article How to achieve higher system robustness in DC drives, part 2: interlock and deadtime 30 May 2018
Technical article Boosting efficiency for your solar inverter designs 24 May 2018

Design & development

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Evaluation board

UCC5320SCEVM-058 — UCC5320SC isolated gate driver evaluation module

UCC5320SCEVM is an Evaluation Module used to evaluate UCC53xx family of devices and it provides user with flexiblity of configuring  driver to Split output, miller clamp or UVLO based on the device used . The EVM features enough test points & jumper options for one to evaluate the device (...)
User guide: PDF
Not available on TI.com
Evaluation board

UCC5390ECDWVEVM — UCC5390ECDWV 10-A, 10-A 5-kVRMS Isolated Single-Channel Gate Driver Evaluation Module

UCC5390ECDWVEVM is designed for evaluating the UCC53xxDWV family, which is a 5.0-kVRMS Isolated Single-Channel Gate Driver with 10-A source and 10-A sink peak current capability. This EVM could be served to evaluate the driver IC against its datsheet. The EVM can also be used as Driver IC (...)
User guide: PDF
Not available on TI.com
Evaluation board

UCC5390SCDEVM-010 — Compact Single-Channel 3-kVrms Isolated 17-A Gate Drive Bias Supply Evaluation Module

The UCC5390SCDEVM-010 is a complete single channel isolated gate drive board including reconfigurable bias supply providing wide range of drive voltages. The EVM is based on a 17-A split output basic insulation UCC5390SCD Driver in SOIC-8 package. The design also includes SN6505B based bias supply (...)
User guide: PDF
Not available on TI.com
Simulation model

UCC5350MCD PSpice Transient Model (Rev. A)

SLLM368A.ZIP (54 KB) - PSpice Model
Simulation model

UCC5350MCD Unencrypted PSpice Transient Model (Rev. A)

SLLM367A.ZIP (3 KB) - PSpice Model
Simulation model

UCC5350SBD PSpice Transient Model

SLLM379.ZIP (53 KB) - PSpice Model
Simulation model

UCC5350SBD Unencrypted PSpice Transient Model

SLLM378.ZIP (3 KB) - PSpice Model
Calculation tool

UCC53x0 Gate Resistor and Thermal Calculator Tool

SLURAY7.ZIP (1677 KB)
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Package Pins Download
SOIC (D) 8 View options
SOIC (DWV) 8 View options

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