Gehäuseinformationen
| Gehäuse | Pins DSBGA (YZH) | 16 |
| Betriebstemperaturbereich (°C) -40 to 85 |
| Gehäusemenge | Träger 3.000 | LARGE T&R |
Merkmale von TPS62361B
- 3A Peak Output Current
- Highest Efficiency:
- Low RDS,on Switch and Active Rectifier
- Power Save Mode for Light Loads
- I2C High Speed Compatible Interface
- Programmable Output Voltage for Digital Voltage Scaling
- TPS62360/62: 0.77V to 1.4V, 10mV Steps
- TPS62361B/63: 0.5V to 1.77V, 10mV Steps
- Excellent DC/AC Output Voltage Regulation
- Differential Load Sensing
- Precise DC Output Voltage Accuracy
- DCS-Control Architecture for Fast and Precise Transient Regulation
- Multiple Robust Operation/Protection Features:
- Soft Start
- Programmable Slew Rate at Voltage Transition
- Over Temperature Protection
- Input Under Voltage Detection and Lockout
- Available in 16-Bump, 2mm × 2mm NanoFree Package
- Low External Device Count: < 25mm2 Solution Size
Beschreibung von TPS62361B
The TPS6236x are a family of high-frequency synchronous step down dc-dc converter optimized for battery-powered portable applications for a small solution size. With an input voltage range of 2.5V to 5.5V, common battery technologies are supported. The device provides up to 3A peak load current, operating at 2.5MHz typical switching frequency.
The devices convert to an output voltage range of 0.77V to 1.4V (TPS62360/62) and 0.5V to 1.77V (TPS62361B/63), programmable via I2C interface in 10mV steps. Dedicated inputs allow fast voltage transition to address processor performance operating points.
The TPS6236x supports low-voltage DSPs and processor cores in smart-phones and handheld computers including latest submicron processes. Dedicated hardware input pins allow simple transitions to performance operating points and retention modes of processors.
The devices focus on a high output voltage accuracy. The differential sensing and the DCS-Control architecture achieve precise static and dynamic, transient output voltage regulation.
The TPS6236x devices offer high efficiency step down conversion. The area of highest efficiency is extended towards low output currents to increase the efficiency while the processor is operating in retention mode, as well as towards highest output currents increasing the battery on-time.
The robust architecture and multiple safety features allow perfect system integration.
The 2mm x 2mm package and the low number of required external components lead to a tiny solution size of less than 25mm2.