The CDCM7005 is a high-performance, low phase noise and low skew clock synchronizer that synchronizes a VCXO (voltage controlled crystal oscillator) or VCO (voltage controlled oscillator) frequency to one of the two reference clocks. The programmable pre-divider M and the feedback-dividers N and P give a high flexibility to the frequency ratio of the reference clock to VC(X)O
VC(X)O_IN clock operates up to 2.2 GHz. Through the selection of external VC(X)O and loop filter components, the PLL loop bandwidth and damping factor can be adjust to meet different system requirements.
The CDCM7005 can lock to one of two reference clock inputs (PRI_REF and SEC_REF), supports frequency hold-over mode and fast-frequency-locking for fail-safe and increased system redundancy. The outputs of the CDCM7005 are user definable and can be any combination of up to five LVPECL outputs or up to 10 LVCMOS outputs. The built in synchronization latches ensure that all outputs are synchronized for low output skew.
All device settings, like outputs signaling, divider value, and input selection are programmable by SPI (3-wire serial peripheral interface). SPI allows individually control of the device settings.
The device operates in 3.3-V environment and is characterized for operation from –40°C to 85°C.
| Tipo | Título | Fecha | ||
|---|---|---|---|---|
| * | Data sheet | CDCM7005 3.3-V High Performance Clock Synchronizer and Jitter Cleaner datasheet (Rev. G) | PDF | HTML | 16 ago 2017 |
| * | Radiation & reliability report | CDCM7005MHFG-V Radiation Test Report | 12 nov 2014 | |
| EVM User's guide | TSW3070EVM: Amplifier Interface to Current Sink DAC - (Rev. A) | 23 may 2016 | ||
| User guide | GC5325 System Evaluation Kit (Rev. F) | 20 abr 2011 | ||
| Application note | TLK313x/CDCM7005 Multi-hop Performance | 01 nov 2009 | ||
| EVM User's guide | TSW4100EVM User's Guide (Rev. A) | 16 sep 2008 | ||
| Product overview | TSW3003: RF Transmit Signal Chain Demonstration Kit Bulletin | 28 sep 2006 | ||
| User guide | CDCM7005 (BGA Package) Evaluation Module Manual (Rev. A) | 19 dic 2005 | ||
| EVM User's guide | CDCM7005 (QFN Package) EVM Users Guide (Rev. A) | 19 dic 2005 | ||
| Application note | Phase Noise/Phase Jitter Performance of CDCM7005 | 26 jul 2005 | ||
| EVM User's guide | CDCM7005 (QFN Package) EVM Manual | 14 jul 2005 | ||
| User guide | CDCM7005 (BGA Package) Evaluation Module Manual | 27 jun 2005 |
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The CDC7005 is a high-performance, low phase noise and low skew clock synchronizer that synchronizes voltage controlled crystal oscillator (VCXO) frequency to an external reference clock; generates very low phase noise (jitter) clock.
The PLL loop bandwidth and damping factor can be adjusted to meet (...)
The CDCM7005 is a high-performance, low phase noise and low skew clock synchronizer that synchronizes voltage controlled crystal oscillator (VCXO) frequency to an external reference clock; generates very low phase noise (jitter) clock.
The PLL loop bandwidth and damping factor can be adjusted to (...)
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| Paquete | Pasadores | Descargar |
|---|---|---|
| BGA (ZVA) | 64 | Ver opciones |
| VQFN (RGZ) | 48 | Ver opciones |
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