DP83843

ACTIVO

Transceptor PHY Ethernet de 10/100 Mbps con soporte AUI y fibra

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Hoja de datos

document-pdfAcrobat DP83843 PHYTER datasheet (Rev. B) (Inglés)

DP83843

ACTIVO

Hoja de datos

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Detalles del producto

Datarate (Mbps)

10/100

Interface type

MII, SNI

Rating

Catalog

Number of ports

Single

Features

AUI support, FX support

I/O supply voltage (typ) (V)

5

Operating temperature range (°C)

0 to 70

Number of LEDs

6

Datarate (Mbps)

10/100

Interface type

MII, SNI

Rating

Catalog

Number of ports

Single

Features

AUI support, FX support

I/O supply voltage (typ) (V)

5

Operating temperature range (°C)

0 to 70

Number of LEDs

6

QFP (NNC)

80

295.84 mm² (17.2 mm × 17.2 mm)

IEEE 802.3 ENDEC with AUI/10BASE-T transceivers
and built-in filters
IEEE 802.3u 100BASE-TX compatible - directly drives
standard Category 5 UTP, no need for external
100BASE-TX transceiver
Fully Integrated and fully compliant ANSI X3.263 TPPMD
physical sublayer which includes adaptive equalization
and BLW compensation
IEEE 802.3u 100BASE-FX compatible - connects directly
to industry standard Electrical/Optical transceivers
IEEE 802.3u Auto-Negotiation for automatic speed selection
IEEE 802.3u compatible Media Independent Interface
(MII) with Serial Management Interface
Integrated high performance 100 Mb/s clock recovery
circuitry requiring no external filters
Full Duplex support for 10 and 100 Mb/s data rates
MII Serial 10 Mb/s mode
Fully configurable node/switch and 100Mb/s repeater
modes
Programmable loopback modes for flexible systemdiagnostics
Flexible LED support
Single register access to complete PHY status
MDIO interrupt support
Individualized scrambler seed for 100BASE-TX applications
using multiple PHYs
Low power consumption for multi-port applications
Small footprint 80-pin PQFP package

IEEE 802.3 ENDEC with AUI/10BASE-T transceivers
and built-in filters
IEEE 802.3u 100BASE-TX compatible - directly drives
standard Category 5 UTP, no need for external
100BASE-TX transceiver
Fully Integrated and fully compliant ANSI X3.263 TPPMD
physical sublayer which includes adaptive equalization
and BLW compensation
IEEE 802.3u 100BASE-FX compatible - connects directly
to industry standard Electrical/Optical transceivers
IEEE 802.3u Auto-Negotiation for automatic speed selection
IEEE 802.3u compatible Media Independent Interface
(MII) with Serial Management Interface
Integrated high performance 100 Mb/s clock recovery
circuitry requiring no external filters
Full Duplex support for 10 and 100 Mb/s data rates
MII Serial 10 Mb/s mode
Fully configurable node/switch and 100Mb/s repeater
modes
Programmable loopback modes for flexible systemdiagnostics
Flexible LED support
Single register access to complete PHY status
MDIO interrupt support
Individualized scrambler seed for 100BASE-TX applications
using multiple PHYs
Low power consumption for multi-port applications
Small footprint 80-pin PQFP package

The DP83843BVJE is a full feature Physical Layer device with integrated PMD sublayers to support both 10BASE-T and 100BASE-X Ethernet protocols.

This VLSI device is designed for easy implementation of 10/100 Mb/s Ethernet LANs. It interfaces directly to Twisted Pair media through an external transformer or to fiber media via industry standard electrical/optical fiber PMD transceivers. This device also interfaces directly to the MAC layer through the IEEE 802.3u standard Media Independent Interface (MII), ensuring interoperability between products from different vendors.

The DP83843 is designed with National Semiconductor’s advanced CMOS process. Its system architecture is based on the integration of several of National's industry proven core technologies:

IEEE 802.3 ENDEC with AUI/10BASE-T transceiver module to provide the 10 Mb/s functions
Clock Recovery/Generator Modules fromNational's Fast Ethernet and FDDI products
FDDI Stream Cipher scrambler/descrambler for TP-PMD
100BASE-Xphysical codingsub-layer (PCS) andcontrol logic that integrates the core modules into a dual speed Ethernet physical layer controller
ANSI X3T12 Compliant TP-PMD Transceiver technology with Baseline Wander (BLW) compensation

The DP83843BVJE is a full feature Physical Layer device with integrated PMD sublayers to support both 10BASE-T and 100BASE-X Ethernet protocols.

This VLSI device is designed for easy implementation of 10/100 Mb/s Ethernet LANs. It interfaces directly to Twisted Pair media through an external transformer or to fiber media via industry standard electrical/optical fiber PMD transceivers. This device also interfaces directly to the MAC layer through the IEEE 802.3u standard Media Independent Interface (MII), ensuring interoperability between products from different vendors.

The DP83843 is designed with National Semiconductor’s advanced CMOS process. Its system architecture is based on the integration of several of National's industry proven core technologies:

IEEE 802.3 ENDEC with AUI/10BASE-T transceiver module to provide the 10 Mb/s functions
Clock Recovery/Generator Modules fromNational's Fast Ethernet and FDDI products
FDDI Stream Cipher scrambler/descrambler for TP-PMD
100BASE-Xphysical codingsub-layer (PCS) andcontrol logic that integrates the core modules into a dual speed Ethernet physical layer controller
ANSI X3T12 Compliant TP-PMD Transceiver technology with Baseline Wander (BLW) compensation

filter

Buscar otro/a Capa física (PHY) Ethernet

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Documentación técnica

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Documentación principal	Tipo	Título	Opciones de formato	Fecha
*	Hoja de datos	DP83843 PHYTER datasheet (Rev. B)		13/11/2013
	Nota sobre la aplicación	How to Pass IEEE Ethernet Compliance Tests	PDF \| HTML	20/09/2021
	Nota sobre la aplicación	AN-1506 DP83843 to DP83848C/I/YB PHYTER System Rollover Document (Rev. A)		26/04/2013

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Controlador o biblioteca

ETHERNET-SW — Controladores y herramientas de PHY Ethernet

Los controladores para transceptores de capa física (PHY) Ethernet de Texas Instruments admiten la comunicación a través de la interfaz de administración en serie (MDC/MDIO) para configurar y leer registros PHY. Puede encontrar controladores Linux y RTOS en nuestro github.

Productos y hardware compatibles

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Soporte de software

USB-2-MDIO — USB-2-MDIO Tool v1.0

La herramienta de software USB-2-MDIO permite a los PHY Ethernet de Texas Instruments acceder a los registros de estado y control de dispositivos MDIO. La herramienta USB-2-MDIO incluye un kit de desarrollo LaunchPad™ para los MCU MSP430™ de TI que está conectado con una interfaz gráfica de (...)

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