DRA76P

ACTIVO

Procesadores SoC multinúcleo de alto rendimiento con ISP para aplicaciones de cabina digital

Detalles del producto

Arm CPU 2 Arm Cortex-A15 Arm (max) (MHz) 1800 Coprocessors 2 Dual Arm Cortex-M4 CPU 32-bit Graphics acceleration 1 2D, 2 3D Display type 1 HDMI, 3 LCD Protocols Ethernet Ethernet MAC 1-Port 10/100/1000, 2-Port 1Gb switch PCIe 1 PCIe Gen 2 Hardware accelerators 1 Image Subsystem Processor, 1 Image Video Accelerator, 2 Viterbi Decoder, Audio Tracking Features Multimedia Operating system Android, Linux, RTOS Security Cryptography, Debug security, Device identity, Isolation firewalls, Secure boot, Secure storage & programming, Software IP protection Rating Automotive Operating temperature range (°C) -40 to 125
Arm CPU 2 Arm Cortex-A15 Arm (max) (MHz) 1800 Coprocessors 2 Dual Arm Cortex-M4 CPU 32-bit Graphics acceleration 1 2D, 2 3D Display type 1 HDMI, 3 LCD Protocols Ethernet Ethernet MAC 1-Port 10/100/1000, 2-Port 1Gb switch PCIe 1 PCIe Gen 2 Hardware accelerators 1 Image Subsystem Processor, 1 Image Video Accelerator, 2 Viterbi Decoder, Audio Tracking Features Multimedia Operating system Android, Linux, RTOS Security Cryptography, Debug security, Device identity, Isolation firewalls, Secure boot, Secure storage & programming, Software IP protection Rating Automotive Operating temperature range (°C) -40 to 125
FCCSP (ACD) 784 529 mm² 23 x 23
  • Architecture Designed for Infotainment Applications
  • Video, Image, and Graphics Processing Support
    • Full-HD Video (1920 × 1080p, 60 fps)
    • Multiple Video Input and Video Output
    • 2D and 3D Graphics
  • Dual Arm® Cortex®-A15 Microprocessor Subsystem
  • Up to Two C66x Floating-Point VLIW DSP
    • Fully Object-Code Compatible with C67x and C64x+
    • Up to Thirty-Two 16 x 16-Bit Fixed-Point Multiplies per Cycle
  • Up to 2.5MB of On-Chip L3 RAM
  • Level 3 (L3) and Level 4 (L4) Interconnects
  • Two DDR2/DDR3/DDR3L Memory Interface (EMIF) Modules
    • Supports up to DDR2-800 and DDR3-1333
    • Up to 2GB Supported per EMIF
  • Dual ARM® Cortex®-M4 Image Processing Units (IPU)
  • Up to Two Embedded Vision Engines (EVEs)
  • Imaging Subsystem (ISS)
    • Image Signal Processor (ISP)
    • Wide Dynamic Range and Lens Distortion Correction (WDR and Mesh LDC)
    • One Camera Adaptation Layer (CAL_B)
  • IVA Subsystem
  • Display Subsystem
    • Display Controller with DMA Engine and up to Three Pipelines
    • HDMI™ Encoder: HDMI 1.4a and DVI 1.0 Compliant
  • Video Processing Engine (VPE)
  • 2D-Graphics Accelerator (BB2D) Subsystem
    • Vivante® GC320 Core
  • Dual-Core PowerVR® SGX544 3D GPU
  • Two Video Input Port (VIP) Modules
    • Support for up to Eight Multiplexed Input Ports
  • General-Purpose Memory Controller (GPMC)
  • Enhanced Direct Memory Access (EDMA) Controller
  • 2-Port Gigabit Ethernet (GMAC)
  • Sixteen 32-Bit General-Purpose Timers
  • 32-Bit MPU Watchdog Timer
  • Five Inter-Integrated Circuit (I2C) Ports
  • HDQ™/1-Wire® Interface
  • SATA Interface
  • Media Local Bus (MLB) Subsystem
  • Ten Configurable UART/IrDA/CIR Modules
  • Four Multichannel Serial Peripheral Interfaces (McSPI)
  • Quad SPI (QSPI)
  • Eight Multichannel Audio Serial Port (McASP) Modules
  • SuperSpeed USB 3.0 Dual-Role Device
  • Three High-Speed USB 2.0 Dual-Role Devices
  • Four MultiMedia Card/Secure Digital/Secure Digital Input Output Interfaces (MMC™/SD®/SDIO)
  • PCI Express® 3.0 Subsystems with Two 5-Gbps Lanes
    • One 2-Lane Gen2-Compliant Port
    • or Two 1-Lane Gen2-Compliant Ports
  • Up to Two Controller Area Network (DCAN) Modules
    • CAN 2.0B Protocol
  • Modular Controller Area Network (MCAN) Module
    • CAN 2.0B Protocol with Available FD (Flexible Data Rate) Functionality
  • MIPI CSI-2 Camera Serial Interface
  • Up to 247 General-Purpose I/O (GPIO) Pins
  • Device Security Features
    • Hardware Crypto Accelerators and DMA
    • Firewalls
    • JTAG® Lock
    • Secure Keys
    • Secure ROM and Boot
    • Customer Programmable Keys and OTP Data
  • Power, Reset, and Clock Management
  • On-Chip Debug with CTools Technology
  • 28-nm CMOS Technology
  • 23 mm × 23 mm, 0.8-mm Pitch, 784-Pin BGA (ACD)
  • Architecture Designed for Infotainment Applications
  • Video, Image, and Graphics Processing Support
    • Full-HD Video (1920 × 1080p, 60 fps)
    • Multiple Video Input and Video Output
    • 2D and 3D Graphics
  • Dual Arm® Cortex®-A15 Microprocessor Subsystem
  • Up to Two C66x Floating-Point VLIW DSP
    • Fully Object-Code Compatible with C67x and C64x+
    • Up to Thirty-Two 16 x 16-Bit Fixed-Point Multiplies per Cycle
  • Up to 2.5MB of On-Chip L3 RAM
  • Level 3 (L3) and Level 4 (L4) Interconnects
  • Two DDR2/DDR3/DDR3L Memory Interface (EMIF) Modules
    • Supports up to DDR2-800 and DDR3-1333
    • Up to 2GB Supported per EMIF
  • Dual ARM® Cortex®-M4 Image Processing Units (IPU)
  • Up to Two Embedded Vision Engines (EVEs)
  • Imaging Subsystem (ISS)
    • Image Signal Processor (ISP)
    • Wide Dynamic Range and Lens Distortion Correction (WDR and Mesh LDC)
    • One Camera Adaptation Layer (CAL_B)
  • IVA Subsystem
  • Display Subsystem
    • Display Controller with DMA Engine and up to Three Pipelines
    • HDMI™ Encoder: HDMI 1.4a and DVI 1.0 Compliant
  • Video Processing Engine (VPE)
  • 2D-Graphics Accelerator (BB2D) Subsystem
    • Vivante® GC320 Core
  • Dual-Core PowerVR® SGX544 3D GPU
  • Two Video Input Port (VIP) Modules
    • Support for up to Eight Multiplexed Input Ports
  • General-Purpose Memory Controller (GPMC)
  • Enhanced Direct Memory Access (EDMA) Controller
  • 2-Port Gigabit Ethernet (GMAC)
  • Sixteen 32-Bit General-Purpose Timers
  • 32-Bit MPU Watchdog Timer
  • Five Inter-Integrated Circuit (I2C) Ports
  • HDQ™/1-Wire® Interface
  • SATA Interface
  • Media Local Bus (MLB) Subsystem
  • Ten Configurable UART/IrDA/CIR Modules
  • Four Multichannel Serial Peripheral Interfaces (McSPI)
  • Quad SPI (QSPI)
  • Eight Multichannel Audio Serial Port (McASP) Modules
  • SuperSpeed USB 3.0 Dual-Role Device
  • Three High-Speed USB 2.0 Dual-Role Devices
  • Four MultiMedia Card/Secure Digital/Secure Digital Input Output Interfaces (MMC™/SD®/SDIO)
  • PCI Express® 3.0 Subsystems with Two 5-Gbps Lanes
    • One 2-Lane Gen2-Compliant Port
    • or Two 1-Lane Gen2-Compliant Ports
  • Up to Two Controller Area Network (DCAN) Modules
    • CAN 2.0B Protocol
  • Modular Controller Area Network (MCAN) Module
    • CAN 2.0B Protocol with Available FD (Flexible Data Rate) Functionality
  • MIPI CSI-2 Camera Serial Interface
  • Up to 247 General-Purpose I/O (GPIO) Pins
  • Device Security Features
    • Hardware Crypto Accelerators and DMA
    • Firewalls
    • JTAG® Lock
    • Secure Keys
    • Secure ROM and Boot
    • Customer Programmable Keys and OTP Data
  • Power, Reset, and Clock Management
  • On-Chip Debug with CTools Technology
  • 28-nm CMOS Technology
  • 23 mm × 23 mm, 0.8-mm Pitch, 784-Pin BGA (ACD)

DRA77xP and DRA76xP (Jacinto 6 Plus) automotive applications processors are built to meet the intense processing needs of the modern digital cockpit automobile experiences.

The device enables Original-Equipment Manufacturers (OEMs) and Original-Design Manufacturers (ODMs) to quickly implement innovative connectivity technologies, speech recognition, audio streaming, and more. Jacinto 6 Plus devices bring high processing performance through the maximum flexibility of a fully integrated mixed processor solution. The devices also combine programmable video processing with a highly integrated peripheral set.

Programmability is provided by dual-core Arm Cortex-A15 RISC CPUs with Neon™ extension, TI C66x VLIW floating-point DSP core, and Vision AccelerationPac (with one or more EVEs). The Arm allows developers to keep control functions separate from other algorithms programmed on the DSP and coprocessors, thus reducing the complexity of the system software.

Additionally, TI provides a complete set of development tools for the Arm, DSP, and EVE coprocessor, including C compilers and a debugging interface for visibility into source code.

Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment are available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.

The DRA77xP and DRA76xP Jacinto 6 Plus processor family is qualified according to the AEC-Q100 standard.

DRA77x and DRA76x (Jacinto 6 Plus) automotive applications processors are built to meet the intense processing needs of the modern digital cockpit automobile experiences.

The device enables Original-Equipment Manufacturers (OEMs) and Original-Design Manufacturers (ODMs) to quickly implement innovative connectivity technologies, speech recognition, audio streaming, and more. Jacinto 6 Plus devices bring high processing performance through the maximum flexibility of a fully integrated mixed processor solution. The devices also combine programmable video processing with a highly integrated peripheral set.

Programmability is provided by dual-core Arm Cortex-A15 RISC CPUs with Neon extension, TI C66x VLIW floating-point DSP core, and Vision AccelerationPac (with one or more EVEs). The Arm allows developers to keep control functions separate from other algorithms programmed on the DSP and coprocessors, thus reducing the complexity of the system software.

Additionally, TI provides a complete set of development tools for the Arm, DSP, and EVE coprocessor, including C compilers and a debugging interface for visibility into source code.

Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment are available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.

The DRA77x and DRA76x Jacinto 6 Plus processor family is qualified according to the AEC-Q100 standard.

DRA77xP and DRA76xP (Jacinto 6 Plus) automotive applications processors are built to meet the intense processing needs of the modern digital cockpit automobile experiences.

The device enables Original-Equipment Manufacturers (OEMs) and Original-Design Manufacturers (ODMs) to quickly implement innovative connectivity technologies, speech recognition, audio streaming, and more. Jacinto 6 Plus devices bring high processing performance through the maximum flexibility of a fully integrated mixed processor solution. The devices also combine programmable video processing with a highly integrated peripheral set.

Programmability is provided by dual-core Arm Cortex-A15 RISC CPUs with Neon™ extension, TI C66x VLIW floating-point DSP core, and Vision AccelerationPac (with one or more EVEs). The Arm allows developers to keep control functions separate from other algorithms programmed on the DSP and coprocessors, thus reducing the complexity of the system software.

Additionally, TI provides a complete set of development tools for the Arm, DSP, and EVE coprocessor, including C compilers and a debugging interface for visibility into source code.

Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment are available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.

The DRA77xP and DRA76xP Jacinto 6 Plus processor family is qualified according to the AEC-Q100 standard.

DRA77x and DRA76x (Jacinto 6 Plus) automotive applications processors are built to meet the intense processing needs of the modern digital cockpit automobile experiences.

The device enables Original-Equipment Manufacturers (OEMs) and Original-Design Manufacturers (ODMs) to quickly implement innovative connectivity technologies, speech recognition, audio streaming, and more. Jacinto 6 Plus devices bring high processing performance through the maximum flexibility of a fully integrated mixed processor solution. The devices also combine programmable video processing with a highly integrated peripheral set.

Programmability is provided by dual-core Arm Cortex-A15 RISC CPUs with Neon extension, TI C66x VLIW floating-point DSP core, and Vision AccelerationPac (with one or more EVEs). The Arm allows developers to keep control functions separate from other algorithms programmed on the DSP and coprocessors, thus reducing the complexity of the system software.

Additionally, TI provides a complete set of development tools for the Arm, DSP, and EVE coprocessor, including C compilers and a debugging interface for visibility into source code.

Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment are available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.

The DRA77x and DRA76x Jacinto 6 Plus processor family is qualified according to the AEC-Q100 standard.

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Documentación técnica

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Tipo Título Fecha
* Data sheet DRA77xP, DRA76xP Infotainment Applications Processor Silicon Revision 1.0 datasheet (Rev. E) PDF | HTML 10 dic 2018
* Errata DRA7xx Silicon Errata (Rev. A) PDF | HTML 15 feb 2021
* User guide DRA77xP, DRA76xP, DRA75xP, DRA74xP Technical Reference Manual (Rev. C) 25 feb 2020
Application note Integrating virtual DRM between VISION SDK and PSDK on Jacinto6 SOC PDF | HTML 05 may 2021
More literature Building your application with security in mind (Rev. E) 28 oct 2020
Application note IVA-HD Sharing Between VISION-SDK and PSDKLA on Jacinto6 SoC PDF | HTML 24 ago 2020
Application note AM57x, DRA7x, and TDA2x EMIF Tools (Rev. E) 06 ene 2020
Application note Integrating New Cameras With Video Input Port on DRA7xx SoCs PDF | HTML 11 jun 2019
Application note Achieving Early CAN Response on DRA7xx Devices 28 nov 2018
Application note DRA74x_75x/DRA72x Performance (Rev. A) 31 oct 2018
Application note Audio Post Processing Engine on Jacinto™ DRA7x Family of Devices 14 sep 2018
Application note The Implementation of YUV422 Output for SRV 02 ago 2018
Application note MMC DLL Tuning (Rev. B) 31 jul 2018
Application note Integrating AUTOSAR on TI SoC: Fundamentals 18 jun 2018
Application note ECC/EDC on TDAxx (Rev. B) 13 jun 2018
Application note Tools and Techniques to Root Case Failures in Video Capture Subsystem 12 jun 2018
Application note Sharing VPE Between VISIONSDK and PSDKLA 04 may 2018
User guide LP87565C-Q1 and TPS65917-Q1 User’s Guide to Power DRA7xxP and TDA2Pxx (Rev. A) 20 abr 2018
Application note Android Boot Optimization on DRA7xx Devices (Rev. A) 13 feb 2018
Technical article Jacinto™ DRA automotive processors drive digital cockpit solutions PDF | HTML 12 ene 2018
Application note Flashing Utility - mflash 09 ene 2018
Application note Using Peripheral Boot and DFU for Rapid Development on Jacinto 6 Devices (Rev. A) 30 nov 2017
Application note Jacinto6 Spread Spectrum Clocking Configuration (Rev. A) 27 nov 2017
Application note Optimizing DRA7xx and TDA2xx Processors for use with Video Display SERDES (Rev. B) 07 nov 2017
Application note A Guide to Debugging With CCS on the DRA75x, DRA74x, TDA2x and TDA3x Family of D (Rev. B) 03 nov 2017
Application note Robust Rear-View Camera (RVC) App Report 13 sep 2017
Application note Optimization of GPU-Based Surround View on TI’s TDA2x SoC 12 sep 2017
Application note Using DSS Write-Back Pipeline for RGB-to-YUV Conversion on DRA7xx Devices 14 ago 2017
Application note Software Guidelines to EMIF/DDR3 Configuration on DRA7xx Devices 12 jul 2017
White paper Revolutionize the automotive cockpit 02 jun 2017
Application note Linux Boot Time Optimizations on DRA7xx Devices 31 mar 2017
Application note Interfacing DRA75x and DRA74x Audio to Analog Codecs (Rev. A) 17 feb 2017
Application note Early Splash Screen on DRA7x Devices 31 ene 2017
Application note Quality of Service (QoS) Knobs for DRA74x, DRA75x & TDA2x Family of Devices (Rev. A) 15 dic 2016
Application note Gstreamer Migration Guidelines 26 abr 2016
User guide Jacinto6 Android Video Decoder Software Design Specification User's Guide 21 abr 2016
User guide Jacinto6 Android Video Encoder Software Design Specification User's Guide 21 abr 2016
Application note Flashing Binaries to DRA7xx Factory Boards Using DFU 14 abr 2016
Application note Tools and Techniques for Audio Debugging 13 abr 2016
Application note Debugging Tools and Techniques With IPC3.x 30 mar 2016
Application note Modifying Memory Usage for IPUMM Applications Loaded IPC 3.x for DRA75x, DRA74x (Rev. A) 15 ene 2016
White paper Informational ADAS as Software Upgrade to Today’s Infotainment Systems 14 oct 2014
Application note Guide to fix Perf Issues Using QoS Knobs for DRA74x, DRA75x, TDA2x & TD3x Device 13 ago 2014
White paper Today’s high-end infotainment soon becoming mainstream 02 jun 2014

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

J6PEVM577P — Módulo de evaluación DRA7xP

The DRA77xP/DRA76xP-ACD is an evaluation platform designed to allow scalability and re-use across DRA77xP and DRA76xP JacintoTM Infotainment System-on-Chips (SoCs), it is based on Jacinto DRA77xP SoC that incorporates a heterogeneous, scalable architecture that includes a mix of two ARM Cortex-A15 (...)

Desde: SVTRONICS INC
Guía del usuario: PDF
Kit de desarrollo de software (SDK)

PROCESSOR-SDK-ANDROID-AUTOMOTIVE-DRA7X

Processor SDK Linux Automotive

Processor SDK Linux Automotive is the foundational software development platform for TI's Jacinto™ DRAx family of Infotainment SoCs. The software framework allows users to develop feature-rich Infotainment solutions such as reconfigurable digital instrument (...)

Productos y hardware compatibles

Productos y hardware compatibles

Productos
Procesadores basados en Arm
DRA710 Procesador ARM Cortex-A15 SoC de 600 MHz con gráficos para información y entretenimiento y clúster DRA712 Procesador ARM Cortex-A15 SoC de 600 MHz con gráficos y doble Arm Cortex-M4 para información y entre DRA714 Procesador ARM Cortex-A15 SoC de 600 MHz con gráficos y DSP para información y entretenimiento y clú DRA716 Procesador ARM Cortex-A15 SoC de 800 MHz con gráficos y DSP para información y entretenimiento y clú DRA718 Procesador ARM Cortex-A15 SoC de 1 GHz con gráficos y DSP para información y entretenimiento y clúst DRA722 Procesador ARM Cortex-A15 SoC de 800 MHz con gráficos y DSP para información y entretenimiento y clú DRA724 Procesador ARM Cortex-A15 SoC de 1 GHz con gráficos y DSP para información y entretenimiento y clúst DRA725 Procesador ARM Cortex-A15 SoC de 1.2 GHz con gráficos y DSP para información y entretenimiento y clú DRA726 ARM Cortex-A15 SoC de 1.5 GHz con gráficos y DSP para información y entretenimiento y clúster DRA74P Procesadores SoC multinúcleo con ISP y compatibles con pines con procesadores SoC DRA74x DRA75P Procesadores SoC multinúcleo con ISP y compatibles con pines con SoC DRA75x para aplicaciones de inf DRA76P Procesadores SoC multinúcleo de alto rendimiento con ISP para aplicaciones de cabina digital DRA77P SoC multinúcleo de alto rendimiento con periféricos ampliados e ISP para aplicaciones de cabina digi DRA790 Procesador SoC Arm Cortex-A15 de 300 MHz con DSP C66x de 500 MHz para amplificador de audio DRA791 Procesador SoC Arm Cortex-A15 de 300 MHz con DSP C66x de 750 MHz para amplificador de audio DRA793 Procesador SoC Arm Cortex-A15 de 500 MHz con DSP C66x de 750 MHz para amplificador de audio DRA797 Procesador SoC Arm Cortex-A15 de 800 MHz con DSP C66x de 750 MHz para amplificador de audio
Procesadores digitales de señales (DSP)
DRA780 Procesador SoC con C66x DSP de 500 MHz y 2 Arm Cortex-M4 dobles para amplificador de audio DRA781 Procesador SoC con C66x DSP de 750 MHz y 2 Arm Cortex-M4 dobles para amplificador de audio DRA782 Procesador SoC con 2 C66x DSP de 500 MHz y 2 Arm Cortex-M4 dobles para amplificador de audio DRA783 Procesador SoC con 2 C66x DSP de 750 MHz y 2 Arm Cortex-M4 dobles para amplificador de audio DRA785 Procesador SoC con 2 C66x DSP de 1000 MHz y 2 Arm Cortex-M4 dobles para amplificador de audio DRA786 Procesador SoC con 2 C66x DSP de 500 MHz y 2 Arm Cortex-M4 dobles y EVE para amplificador de audio DRA787 Procesador SoC con 2 C66x DSP de 750 MHz y 2 Arm Cortex-M4 dobles y EVE para amplificador de audio DRA788 Procesador SoC con 2 C66x DSP de 1000 MHz y 2 Arm Cortex-M4 dobles y 1 EVE para amplificador de a
Opciones de descarga
Kit de desarrollo de software (SDK)

PROCESSOR-SDK-LINUX-AUTOMOTIVE-DRA7X PROCESSOR-SDK-LINUX-AUTOMOTIVE-DRA7X

Processor SDK Linux Automotive

Processor SDK Linux Automotive is the foundational software development platform for TI's Jacinto™ DRAx family of Infotainment SoCs. The software framework allows users to develop feature-rich Infotainment solutions such as reconfigurable digital instrument (...)

Productos y hardware compatibles

Productos y hardware compatibles

Productos
Procesadores basados en Arm
DRA710 Procesador ARM Cortex-A15 SoC de 600 MHz con gráficos para información y entretenimiento y clúster DRA712 Procesador ARM Cortex-A15 SoC de 600 MHz con gráficos y doble Arm Cortex-M4 para información y entre DRA714 Procesador ARM Cortex-A15 SoC de 600 MHz con gráficos y DSP para información y entretenimiento y clú DRA716 Procesador ARM Cortex-A15 SoC de 800 MHz con gráficos y DSP para información y entretenimiento y clú DRA718 Procesador ARM Cortex-A15 SoC de 1 GHz con gráficos y DSP para información y entretenimiento y clúst DRA722 Procesador ARM Cortex-A15 SoC de 800 MHz con gráficos y DSP para información y entretenimiento y clú DRA724 Procesador ARM Cortex-A15 SoC de 1 GHz con gráficos y DSP para información y entretenimiento y clúst DRA725 Procesador ARM Cortex-A15 SoC de 1.2 GHz con gráficos y DSP para información y entretenimiento y clú DRA726 ARM Cortex-A15 SoC de 1.5 GHz con gráficos y DSP para información y entretenimiento y clúster DRA746 Procesador ARM Cortex-A15 SoC de 1.5 GHz doble con gráficos y DSP para información y entretenimiento DRA74P Procesadores SoC multinúcleo con ISP y compatibles con pines con procesadores SoC DRA74x DRA756 Doble procesador SoC de 1.5 GHz A15, EVE doble, DSP doble, periféricos ampliados para sistema de inf DRA75P Procesadores SoC multinúcleo con ISP y compatibles con pines con SoC DRA75x para aplicaciones de inf DRA76P Procesadores SoC multinúcleo de alto rendimiento con ISP para aplicaciones de cabina digital DRA77P SoC multinúcleo de alto rendimiento con periféricos ampliados e ISP para aplicaciones de cabina digi DRA790 Procesador SoC Arm Cortex-A15 de 300 MHz con DSP C66x de 500 MHz para amplificador de audio DRA791 Procesador SoC Arm Cortex-A15 de 300 MHz con DSP C66x de 750 MHz para amplificador de audio DRA793 Procesador SoC Arm Cortex-A15 de 500 MHz con DSP C66x de 750 MHz para amplificador de audio DRA797 Procesador SoC Arm Cortex-A15 de 800 MHz con DSP C66x de 750 MHz para amplificador de audio
Procesadores digitales de señales (DSP)
DRA780 Procesador SoC con C66x DSP de 500 MHz y 2 Arm Cortex-M4 dobles para amplificador de audio DRA781 Procesador SoC con C66x DSP de 750 MHz y 2 Arm Cortex-M4 dobles para amplificador de audio DRA782 Procesador SoC con 2 C66x DSP de 500 MHz y 2 Arm Cortex-M4 dobles para amplificador de audio DRA783 Procesador SoC con 2 C66x DSP de 750 MHz y 2 Arm Cortex-M4 dobles para amplificador de audio DRA785 Procesador SoC con 2 C66x DSP de 1000 MHz y 2 Arm Cortex-M4 dobles para amplificador de audio DRA786 Procesador SoC con 2 C66x DSP de 500 MHz y 2 Arm Cortex-M4 dobles y EVE para amplificador de audio DRA787 Procesador SoC con 2 C66x DSP de 750 MHz y 2 Arm Cortex-M4 dobles y EVE para amplificador de audio DRA788 Procesador SoC con 2 C66x DSP de 1000 MHz y 2 Arm Cortex-M4 dobles y 1 EVE para amplificador de a
Opciones de descarga
Kit de desarrollo de software (SDK)

PROCESSOR-SDK-RTOS-AUTOMOTIVE-DRA7X

Processor SDK Linux Automotive

Processor SDK Linux Automotive is the foundational software development platform for TI's Jacinto™ DRAx family of Infotainment SoCs. The software framework allows users to develop feature-rich Infotainment solutions such as reconfigurable digital instrument (...)

Productos y hardware compatibles

Productos y hardware compatibles

Productos
Procesadores basados en Arm
DRA710 Procesador ARM Cortex-A15 SoC de 600 MHz con gráficos para información y entretenimiento y clúster DRA712 Procesador ARM Cortex-A15 SoC de 600 MHz con gráficos y doble Arm Cortex-M4 para información y entre DRA714 Procesador ARM Cortex-A15 SoC de 600 MHz con gráficos y DSP para información y entretenimiento y clú DRA716 Procesador ARM Cortex-A15 SoC de 800 MHz con gráficos y DSP para información y entretenimiento y clú DRA718 Procesador ARM Cortex-A15 SoC de 1 GHz con gráficos y DSP para información y entretenimiento y clúst DRA722 Procesador ARM Cortex-A15 SoC de 800 MHz con gráficos y DSP para información y entretenimiento y clú DRA724 Procesador ARM Cortex-A15 SoC de 1 GHz con gráficos y DSP para información y entretenimiento y clúst DRA725 Procesador ARM Cortex-A15 SoC de 1.2 GHz con gráficos y DSP para información y entretenimiento y clú DRA726 ARM Cortex-A15 SoC de 1.5 GHz con gráficos y DSP para información y entretenimiento y clúster DRA74P Procesadores SoC multinúcleo con ISP y compatibles con pines con procesadores SoC DRA74x DRA75P Procesadores SoC multinúcleo con ISP y compatibles con pines con SoC DRA75x para aplicaciones de inf DRA76P Procesadores SoC multinúcleo de alto rendimiento con ISP para aplicaciones de cabina digital DRA77P SoC multinúcleo de alto rendimiento con periféricos ampliados e ISP para aplicaciones de cabina digi DRA790 Procesador SoC Arm Cortex-A15 de 300 MHz con DSP C66x de 500 MHz para amplificador de audio DRA791 Procesador SoC Arm Cortex-A15 de 300 MHz con DSP C66x de 750 MHz para amplificador de audio DRA793 Procesador SoC Arm Cortex-A15 de 500 MHz con DSP C66x de 750 MHz para amplificador de audio DRA797 Procesador SoC Arm Cortex-A15 de 800 MHz con DSP C66x de 750 MHz para amplificador de audio
Procesadores digitales de señales (DSP)
DRA780 Procesador SoC con C66x DSP de 500 MHz y 2 Arm Cortex-M4 dobles para amplificador de audio DRA781 Procesador SoC con C66x DSP de 750 MHz y 2 Arm Cortex-M4 dobles para amplificador de audio DRA782 Procesador SoC con 2 C66x DSP de 500 MHz y 2 Arm Cortex-M4 dobles para amplificador de audio DRA783 Procesador SoC con 2 C66x DSP de 750 MHz y 2 Arm Cortex-M4 dobles para amplificador de audio DRA785 Procesador SoC con 2 C66x DSP de 1000 MHz y 2 Arm Cortex-M4 dobles para amplificador de audio DRA786 Procesador SoC con 2 C66x DSP de 500 MHz y 2 Arm Cortex-M4 dobles y EVE para amplificador de audio DRA787 Procesador SoC con 2 C66x DSP de 750 MHz y 2 Arm Cortex-M4 dobles y EVE para amplificador de audio DRA788 Procesador SoC con 2 C66x DSP de 1000 MHz y 2 Arm Cortex-M4 dobles y 1 EVE para amplificador de a
Opciones de descarga
Firmware

VCTR-3P-AUTOSAR — Componentes de software de vector AUTOSAR, HSM y de red para la industria automotriz

Vector is the leading manufacturer of software tools and embedded components for the development of electronic systems and networking from CAN to Automotive Ethernet. Vector has been a partner of automotive manufacturers, suppliers and related industries since 1988, providing software components, (...)
IDE, configuración, compilador o depurador

CCSTUDIO Code Composer Studio™ integrated development environment (IDE)

Code Composer Studio is an integrated development environment (IDE) for TI's microcontrollers and processors. It comprises a suite of tools used to develop and debug embedded applications.  Code Composer Studio is available for download across Windows®, Linux® and macOS® (...)

Productos y hardware compatibles

Productos y hardware compatibles

Este recurso de diseño es compatible con la mayoría de los productos de estas categorías.

Revise la página de detalles del producto para verificar la compatibilidad.

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Sistema operativo (SO)

GHS-3P-INTEGRITY-RTOS — INTEGRITY RTOS de Green Hills

The flagship of Green Hills Software operating systems—the INTEGRITY RTOS—is built around a partitioning architecture to provide embedded systems with total reliability, absolute security, and maximum real-time performance. With its leadership pedigree underscored by certifications in a (...)
Modelo de simulación

DRA7xxP and TDA2Px BSDL Files

SPRM750.ZIP (34 KB) - BSDL Model
Modelo de simulación

DRA7xxP and TDA2Px IBIS Files

SPRM748.ZIP (36622 KB) - IBIS Model
Modelo de simulación

DRA7xxP and TDA2Px Thermal Model

SPRM749.ZIP (2 KB) - Thermal Model
Herramienta de cálculo

CLOCKTREETOOL — Herramienta de árbol de reloj para Sitara, automoción, análisis de visión y procesadores de señal di

The Clock Tree Tool (CTT) for Sitara™ ARM®, Automotive, and Digital Signal Processors is an interactive clock tree configuration software that provides information about the clocks and modules in these TI devices. It allows the user to:
  • Visualize the device clock tree
  • Interact with clock tree (...)
Guía del usuario: PDF
Herramienta de diseño

PROCESSORS-3P-SEARCH — MPU basada en Arm, MCU basada en Arm y herramienta de búsqueda de terceros DSP

TI has partnered with companies to offer a wide range of software, tools, and SOMs using TI processors to accelerate your path to production. Download this search tool to quickly browse our third-party solutions and find the right third-party to meet your needs. The software, tools and modules (...)
Paquete Pasadores Descargar
FCCSP (ACD) 784 Ver opciones

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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Soporte y capacitación

Foros de TI E2E™ con asistencia técnica de los ingenieros de TI

El contenido lo proporcionan “tal como está” TI y los colaboradores de la comunidad y no constituye especificaciones de TI. Consulte los términos de uso.

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