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LF398-N

ACTIVO

Circuito de retención y muestra monolítico (adquisición de 10 µs, desplazamiento de 7 mV)

Detalles del producto

Rating Catalog Operating temperature range (°C) 0 to 70
Rating Catalog Operating temperature range (°C) 0 to 70
SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm) PDIP (P) 8 92.5083 mm² (9.81 mm × 9.43 mm)
  • Operates from ±5-V to ±18-V Supplies
  • Less than 10-µs Acquisition Time
  • Logic Input Compatible With TTL, PMOS, CMOS
  • 0.5-mV Typical Hold Step at Ch = 0.01 µF
  • Low Input Offset
  • 0.002% Gain Accuracy
  • Low Output Noise in Hold Mode
  • Input Characteristics Do Not Change During Hold Mode
  • High Supply Rejection Ratio in Sample or Hold
  • Wide Bandwidth
  • Space Qualified, JM38510
  • Operates from ±5-V to ±18-V Supplies
  • Less than 10-µs Acquisition Time
  • Logic Input Compatible With TTL, PMOS, CMOS
  • 0.5-mV Typical Hold Step at Ch = 0.01 µF
  • Low Input Offset
  • 0.002% Gain Accuracy
  • Low Output Noise in Hold Mode
  • Input Characteristics Do Not Change During Hold Mode
  • High Supply Rejection Ratio in Sample or Hold
  • Wide Bandwidth
  • Space Qualified, JM38510

The LFx98x devices are monolithic sample-and-hold circuits that use BI-FET technology to obtain ultrahigh DC accuracy with fast acquisition of signal and low droop rate. Operating as a unity-gain follower, DC gain accuracy is 0.002% typical and acquisition time is as low as 6 µs to 0.01%. A bipolar input stage is used to achieve low offset voltage and wide bandwidth. Input offset adjust is accomplished with a single pin and does not degrade input offset drift. The wide bandwidth allows the LFx98x to be included inside the feedback loop of 1-MHz operational amplifiers without having stability problems. Input impedance of 1010 Ω allows high-source impedances to be used without degrading accuracy.

P-channel junction FETs are combined with bipolar devices in the output amplifier to give droop rates as low as 5 mV/min with a 1-µF hold capacitor. The JFETs have much lower noise than MOS devices used in previous designs and do not exhibit high temperature instabilities. The overall design ensures no feedthrough from input to output in the hold mode, even for input signals equal to the supply voltages.

Logic inputs on the LFx98x are fully differential with low input current, allowing for direct connection to TTL, PMOS, and CMOS. Differential threshold is
1.4 V. The LFx98x will operate from ±5-V to ±18-V supplies.

An A version is available with tightened electrical specifications.

The LFx98x devices are monolithic sample-and-hold circuits that use BI-FET technology to obtain ultrahigh DC accuracy with fast acquisition of signal and low droop rate. Operating as a unity-gain follower, DC gain accuracy is 0.002% typical and acquisition time is as low as 6 µs to 0.01%. A bipolar input stage is used to achieve low offset voltage and wide bandwidth. Input offset adjust is accomplished with a single pin and does not degrade input offset drift. The wide bandwidth allows the LFx98x to be included inside the feedback loop of 1-MHz operational amplifiers without having stability problems. Input impedance of 1010 Ω allows high-source impedances to be used without degrading accuracy.

P-channel junction FETs are combined with bipolar devices in the output amplifier to give droop rates as low as 5 mV/min with a 1-µF hold capacitor. The JFETs have much lower noise than MOS devices used in previous designs and do not exhibit high temperature instabilities. The overall design ensures no feedthrough from input to output in the hold mode, even for input signals equal to the supply voltages.

Logic inputs on the LFx98x are fully differential with low input current, allowing for direct connection to TTL, PMOS, and CMOS. Differential threshold is
1.4 V. The LFx98x will operate from ±5-V to ±18-V supplies.

An A version is available with tightened electrical specifications.

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Documentación técnica

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Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos LFx98x Monolithic Sample-and-Hold Circuits datasheet (Rev. C) PDF | HTML 5/10/2018
Nota sobre la aplicación AN-301 Signal Conditioning for Sophisticated Transducers (Rev. B) 6/05/2013
Nota sobre la aplicación AN-298 Isolation Techniques for Signal Conditioning (Rev. B) 6/05/2013
Nota sobre la aplicación Applications of the LM3524 Pulse Width Modulator (Rev. B) 23/04/2013
Nota sobre la aplicación Using ADC0808/809 8-Bit uP Compble ADCs w/8-Chan Analog Multiplexr (Rev. B) 22/04/2013
Nota sobre la aplicación Data Acq Using ADC0816 & ADC0817 8-Bit ADC w/On-Chip 16 Chan Multiplexr 10/05/2004
Nota sobre la aplicación AN-294 Special Sample and Hold Techniques 10/05/2004
Nota sobre la aplicación Specifications and Architectures of Sample-and-Hold Amplifiers 3/05/2004
Nota sobre la aplicación Freq-to-Vltg Converter Uses Sample-and-Hold to Improve Response & Ripple 3/10/2002

Diseño y desarrollo

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Encapsulado Pines Símbolos CAD, huellas y modelos 3D
SOIC (D) 14 Ultra Librarian
PDIP (P) 8 Ultra Librarian

Pedidos y calidad

Soporte y capacitación

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