SN74ALVTH16244

OBSOLETO

Búferes de 16 canales, 2.3 V a 3.6 V con retención de bus, entradas CMOS compatibles con TTL y salid

Detalles del producto

Technology family ALVT Number of channels 16 IOL (max) (mA) 24 Supply current (max) (µA) 5000 IOH (max) (mA) -24 Input type TTL-Compatible CMOS Output type 3-State Features Balanced outputs, Bus-hold, Over-voltage tolerant inputs Rating Catalog Operating temperature range (°C) -40 to 85
Technology family ALVT Number of channels 16 IOL (max) (mA) 24 Supply current (max) (µA) 5000 IOH (max) (mA) -24 Input type TTL-Compatible CMOS Output type 3-State Features Balanced outputs, Bus-hold, Over-voltage tolerant inputs Rating Catalog Operating temperature range (°C) -40 to 85
SSOP (DL) 48 164.358 mm² (15.88 mm × 10.35 mm) TVSOP (DGV) 48 62.08 mm² (9.7 mm × 6.4 mm) TSSOP (DGG) 48 101.25 mm² (12.5 mm × 8.1 mm)
  • Members of the Texas Instruments WidebusTM Family
  • State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation
  • 5-V I/O Compatible
  • High Drive Capability (-32 mA/64 mA)
  • Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
  • Support Unregulated Battery Operation Down to 2.3 V
  • Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Auto3-State Eliminates Bus Current Loading When Voltage at the Output Exceeds VCC
  • Ioff and Power-Up 3-State Support Hot Insertion
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • Package Options Include Plastic 300-mil Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG), Thin Very Small-Outline (DGV) Packages, and 380-mil Fine-Pitch Ceramic Flat (WD) Package
  • NOTE: For tape and reel order entry:
    The DGGR package is abbreviated to GR, and
    the DGVR package is abbreviated to VR.
    Widebus is a trademark of Texas Instruments Incorporated.

  • Members of the Texas Instruments WidebusTM Family
  • State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation
  • 5-V I/O Compatible
  • High Drive Capability (-32 mA/64 mA)
  • Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
  • Support Unregulated Battery Operation Down to 2.3 V
  • Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Auto3-State Eliminates Bus Current Loading When Voltage at the Output Exceeds VCC
  • Ioff and Power-Up 3-State Support Hot Insertion
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • Package Options Include Plastic 300-mil Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG), Thin Very Small-Outline (DGV) Packages, and 380-mil Fine-Pitch Ceramic Flat (WD) Package
  • NOTE: For tape and reel order entry:
    The DGGR package is abbreviated to GR, and
    the DGVR package is abbreviated to VR.
    Widebus is a trademark of Texas Instruments Incorporated.

The 'ALVTH16244 devices are 16-bit buffers/line drivers designed for 2.5-V or 3.3-V VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. These devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

When VCC is between 0 and 1.2 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.2 V, the output-enable (OE\) input should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

The SN54ALVTH16244 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALVTH16244 is characterized for operation from -40°C to 85°C.

The 'ALVTH16244 devices are 16-bit buffers/line drivers designed for 2.5-V or 3.3-V VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. These devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

When VCC is between 0 and 1.2 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.2 V, the output-enable (OE\) input should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

The SN54ALVTH16244 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALVTH16244 is characterized for operation from -40°C to 85°C.

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* Hoja de datos 2.5-V/3.3-V 16-Bit Buffers/Drivers With 3-State Outputs datasheet (Rev. G) 21/05/1999

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