パラレル・インターフェイス搭載、12 ビット D/A コンバータ

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DAC81401 アクティブ 高精度の内部リファレンス搭載、シングルチャネル、16 ビット、高電圧出力 DAC Smaller 20-pin TSSOP package (6.5mm ×6.4mm) and integrated reference

製品詳細

Resolution (Bits) 12 Number of DAC channels 1 Interface type Parallel Output type Buffered Voltage INL (max) (±LSB) 0.25 Settling time (µs) 4 Reference type Int Architecture R-2R Rating Catalog Features On-chip Offset and Gain Calibration Sample/update rate (Msps) 0.25 Power consumption (typ) (mW) 625 Operating temperature range (°C) -25 to 85
Resolution (Bits) 12 Number of DAC channels 1 Interface type Parallel Output type Buffered Voltage INL (max) (±LSB) 0.25 Settling time (µs) 4 Reference type Int Architecture R-2R Rating Catalog Features On-chip Offset and Gain Calibration Sample/update rate (Msps) 0.25 Power consumption (typ) (mW) 625 Operating temperature range (°C) -25 to 85
CDIP_SB (JD) 28 362.994 mm² 35.94 x 10.1 SOIC (DW) 28 184.37 mm² 17.9 x 10.3
  • SINGLE INTEGRATED CIRCUIT CHIP
  • MICROCOMPUTER INTERFACE: DOUBLE-BUFFERED LATCH
  • VOLTAGE OUTPUT: ±10V, ±5V, +10V
  • MONOTONICITY GUARANTEED OVER TEMPERATURE
  • ±1/2LSB MAXIMUM NONLINEARITY OVER TEMPERATURE
  • GUARANTEED SPECIFICATIONS AT ±12V AND ±15V SUPPLIES
  • TTL/5V CMOS-COMPATIBLE LOGIC INPUTS

  • SINGLE INTEGRATED CIRCUIT CHIP
  • MICROCOMPUTER INTERFACE: DOUBLE-BUFFERED LATCH
  • VOLTAGE OUTPUT: ±10V, ±5V, +10V
  • MONOTONICITY GUARANTEED OVER TEMPERATURE
  • ±1/2LSB MAXIMUM NONLINEARITY OVER TEMPERATURE
  • GUARANTEED SPECIFICATIONS AT ±12V AND ±15V SUPPLIES
  • TTL/5V CMOS-COMPATIBLE LOGIC INPUTS

The DAC811 is a complete, single-chip integrated-circuit, microprocessor-compatible, 12-bit digital-to-analog converter. The chip combines a precision voltage reference, microcomputer interface logic, and double-buffered latch, in a 12-bit D/A converter with a voltage output amplifier. Fast current switches and a laser-trimmed thin-film resistor network provide a highly accurate and fast D/A converter.

Microcomputer interfacing is facilitated by a double-buffered latch. The input latch is divided into three 4-bit nibbles to permit interfacing to 4-, 8-, 12-, or 16-bit buses and to handle right-or left-justified data. The 12-bit data in the input latches is transferred to the D/A latch to hold the output value.

Input gating logic is designed so that loading the last nibble or byte of data can be accomplished simultaneously with the transfer of data (previously stored in adjacent latches) from adjacent input latches to the D/A latch. This feature avoids spurious analog output values while using an interface technique that saves computer instructions.

The DAC811 is laser trimmed at the wafer level and is specified to ±1/4LSB maximum linearity error (B, K, and S grades) at 25°C and °1/2LSB maximum over the temperature range. All grades are guaranteed monotonic over the specification temperature range.

The DAC811 is available in six performance grades and three package types. DAC811J and K are specified over the temperature ranges of 0°C to +70°C; DAC811A and B are specified over –25°C to +85°C; DAC811R and S are specified over –55°C to +125°C. DAC811J and K are packaged in a reliable 28-pin plastic DIP or plastic SO package, while DAC811A and B are available in a 28-pin 0.6" wide dual-inline hermetically sealed ceramic side-brazed package (H package).

The DAC811 is a complete, single-chip integrated-circuit, microprocessor-compatible, 12-bit digital-to-analog converter. The chip combines a precision voltage reference, microcomputer interface logic, and double-buffered latch, in a 12-bit D/A converter with a voltage output amplifier. Fast current switches and a laser-trimmed thin-film resistor network provide a highly accurate and fast D/A converter.

Microcomputer interfacing is facilitated by a double-buffered latch. The input latch is divided into three 4-bit nibbles to permit interfacing to 4-, 8-, 12-, or 16-bit buses and to handle right-or left-justified data. The 12-bit data in the input latches is transferred to the D/A latch to hold the output value.

Input gating logic is designed so that loading the last nibble or byte of data can be accomplished simultaneously with the transfer of data (previously stored in adjacent latches) from adjacent input latches to the D/A latch. This feature avoids spurious analog output values while using an interface technique that saves computer instructions.

The DAC811 is laser trimmed at the wafer level and is specified to ±1/4LSB maximum linearity error (B, K, and S grades) at 25°C and °1/2LSB maximum over the temperature range. All grades are guaranteed monotonic over the specification temperature range.

The DAC811 is available in six performance grades and three package types. DAC811J and K are specified over the temperature ranges of 0°C to +70°C; DAC811A and B are specified over –25°C to +85°C; DAC811R and S are specified over –55°C to +125°C. DAC811J and K are packaged in a reliable 28-pin plastic DIP or plastic SO package, while DAC811A and B are available in a 28-pin 0.6" wide dual-inline hermetically sealed ceramic side-brazed package (H package).

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種類 タイトル 最新の英語版をダウンロード 日付
* データシート Microprocessor-Compatible 12-Bit Digital-to-Analog Converter データシート 2000年 9月 27日

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記載されている情報:
  • RoHS
  • REACH
  • デバイスのマーキング
  • リード端子の仕上げ / ボールの原材料
  • MSL 定格 / ピーク リフロー
  • MTBF/FIT 推定値
  • 使用原材料
  • 認定試験結果
  • 継続的な信頼性モニタ試験結果
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  • ファブの拠点
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