LM98620
- 3.3 V Single Supply Operation
- CDS or S/H Processing
- 35 MHz Channel Rate
- Enhanced ESD Protection on Timing, Control and LVDS Pins
- Low Power CMOS Design
- 12 Terminal to 16 Terminal (Selectable) LVDS Serialized Data Output
- 4–Wire Serial Interface
- 2 Channel Symmetrical Architecture
- Independent Gain and Offset Correction for Each Channel
- Digital Black Level Calibration for Each Channel
- Digital White Level Calibration for Each Channel
- Programmable Input Clamp
- Key Specifications
- Maximum Input Level:
- 1.2 Vp–p (CDS Gain = 1.0)
- 0.58 Vp–p (CDS Gain = 2.1)
- Input Sample Rate:
- 5 to 35 MSPS – 6ch mode
- 10 to 35 MSPS – 3ch mode
- PGA Gain Range: 1x to 10x (0 to 20 dB)
- CDS/SH Gain Settings: 1x or 2.1x
- Total Channel Gain: 1x to 21x (0 to 26 dB)
- PGA Gain Resolution: 8 bits – Analog
- ADC Resolution: 10 bits
- ADC Sampling Rate: 10 to 70 MSPS
- SNR: 68.5 dB (Gain = 1x)
- Offset DAC Range:
- ±111 mV or ±59.5 mV – FDAC
- ±281 mV – CDAC
- Offset DAC Resolution:
- ±10 bits – FDAC
- ±4 bits – CDAC
- Supply Voltage: 3.0 V to 3.6 V
- Power Dissipation: 1.02 W (typical)
- Maximum Input Level:
The LM98620 is a fully integrated, 10–Bit, 70 MSPS signal processing solution for high performance digital color copiers, scanners, and other image processing applications. High-speed signal throughput is achieved with an innovative six channel architecture utilizing Correlated Double Sampling (CDS), or Sample and Hold (SH) type sampling. Gain settings of 1x or 2x are available in the CDS/SH input stage. Each channel has a dedicated 1x to 10x (8 bit) PGA that allows accurate gain adjustment. The Digital White Level auto calibration loop can automatically set the PGA value to achieve a selected white target level. Each channel also has a ±4 bit coarse and ±10 bit fine analog offset correction DAC that allows offset correction before the sample-and-hold amplifier. These correction values can be controlled by an automated Digital Black Level correction loop. The PGA and offset DACs for each channel are programmed independently allowing unique values of gain and offset for each of the six channels. A 2-to-1 multiplexing scheme routes the signals to three 70 MHz high performance ADCs. The fully differential processing channels achieve exceptional noise immunity, having a very low noise floor of –68.5dB. The 10 bit analog-to-digital converters have excellent dynamic performance, making the LM98620 transparent in the image reproduction chain.
技術資料
| 種類 | タイトル | 最新の英語版をダウンロード | 日付 | |||
|---|---|---|---|---|---|---|
| * | データシート | LM98620 10-bit 70 MSPS 6 Channel Imaging Signal Processor with LVDS Output データシート (Rev. C) | 2014年 5月 14日 |
設計および開発
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| パッケージ | ピン数 | CAD シンボル、フットプリント、および 3D モデル |
|---|---|---|
| TQFP (PFC) | 80 | Ultra Librarian |
購入と品質
- RoHS
- REACH
- デバイスのマーキング
- リード端子の仕上げ / ボールの原材料
- MSL 定格 / ピーク リフロー
- MTBF/FIT 推定値
- 使用原材料
- 認定試験結果
- 継続的な信頼性モニタ試験結果
- ファブの拠点
- 組み立てを実施した拠点
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