VSP2101

生産中止品

CCD センサ向け、オンチップ 10 ビット DAC 搭載、10 ビット、27MSPS、1 チャネル AFE

製品詳細

Resolution (Bits) 10 Sample rate (Msps) 27 Gain (min) (dB) 3 Gain (max) (dB) 34 Pd (typ) (mW) 190 Supply voltage (max) (V) 3.6 Operating temperature range (°C) -25 to 85 Output data format CMOS Parallel Rating Catalog
Resolution (Bits) 10 Sample rate (Msps) 27 Gain (min) (dB) 3 Gain (max) (dB) 34 Pd (typ) (mW) 190 Supply voltage (max) (V) 3.6 Operating temperature range (°C) -25 to 85 Output data format CMOS Parallel Rating Catalog
LQFP (PT) 48 81 mm² 9 x 9
  • CCD SIGNAL PROCESSING:
    Correlated Double Sampling
    Black Level Clamping
    –2 to +34dB Gain Ranging
    High SNR: 53dB
  • 10-bit a/d conversion:
    Up to 27MHz Conversion Rate
    No Missing Codes
  • PORTABLE OPERATION:
    Low Voltage: 2.7V to 3.6V
    Low Power: 190mW at 3.0V
  • LOW POWER: 160mW at 2.7V
  • POWER-DOWN MODE: 18mW
  • CCD SIGNAL PROCESSING:
    Correlated Double Sampling
    Black Level Clamping
    –2 to +34dB Gain Ranging
    High SNR: 53dB
  • 10-bit a/d conversion:
    Up to 27MHz Conversion Rate
    No Missing Codes
  • PORTABLE OPERATION:
    Low Voltage: 2.7V to 3.6V
    Low Power: 190mW at 3.0V
  • LOW POWER: 160mW at 2.7V
  • POWER-DOWN MODE: 18mW

The VSP2101Y is a complete digital camera IC, providing signal conditioning and 10-bit analog-to-digital conversion for the output of a CCD array.

The primary CCD channel provides correlated double sampling to extract the video information from the pixels, -2dB to +34dB gain ranging with digital control for varying illumination conditions, and black level clamping for an accurate black reference.

Input signal clamping and offset correction of the CDS is also performed. The stable gain control is linear in dB. Additionally, the black level is quickly recovered after gain change. An on-chip general purpose 10-bit digital-to-analog converter allows you to obtain analog control voltage for iris control.

The VSP2101Y is available in a 48-lead LQFP package and operates from a single +3V supply.

The VSP2101Y is a complete digital camera IC, providing signal conditioning and 10-bit analog-to-digital conversion for the output of a CCD array.

The primary CCD channel provides correlated double sampling to extract the video information from the pixels, -2dB to +34dB gain ranging with digital control for varying illumination conditions, and black level clamping for an accurate black reference.

Input signal clamping and offset correction of the CDS is also performed. The stable gain control is linear in dB. Additionally, the black level is quickly recovered after gain change. An on-chip general purpose 10-bit digital-to-analog converter allows you to obtain analog control voltage for iris control.

The VSP2101Y is available in a 48-lead LQFP package and operates from a single +3V supply.

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種類 タイトル 最新の英語版をダウンロード 日付
* データシート VSP2101 SpeedPlus™ CCD Signal Processor For Digital Cameras データシート (Rev. A) 2014年 4月 16日

購入と品質

記載されている情報:
  • RoHS
  • REACH
  • デバイスのマーキング
  • リード端子の仕上げ / ボールの原材料
  • MSL 定格 / ピーク リフロー
  • MTBF/FIT 推定値
  • 使用原材料
  • 認定試験結果
  • 継続的な信頼性モニタ試験結果
記載されている情報:
  • ファブの拠点
  • 組み立てを実施した拠点