AFE58JD32LP

활성

18.5mW/ch 전원, 디지털 복조기, JESD204B 및 LVDS 인터페이스를 지원하는 32채널 초음파 AFE

제품 상세 정보

Device type Receiver Number of input channels 32 Active supply current (typ) (mA) 55 Supply voltage (max) (V) 3.9 Operating temperature range (°C) 0 to 85 Interface type LVDS Features Analog Front End (AFE) Rating Catalog
Device type Receiver Number of input channels 32 Active supply current (typ) (mA) 55 Supply voltage (max) (V) 3.9 Operating temperature range (°C) 0 to 85 Interface type LVDS Features Analog Front End (AFE) Rating Catalog
NFBGA (ZAV) 289 225 mm² 15 x 15
  • 32-Channel AFE for Ultrasound Applications:
    • LNA, Attenuator, LPF, ADC, CW Mixer, and Digital I/Q Demodulator
    • Digital Time Gain Compensation (DTGC)
    • Total Gain Range: 0 dB to 48 dB
  • Low-Noise Amplifier (LNA) With Programmable Gain:
    • Low Current Noise of 1pA/rtHz
    • Gain: 21 dB, 18 dB, and 15 dB
    • Linear Input Range: up to 700 mVPP
  • Programmable Attenuator (ATTEN):
    • Attenuation Range (Steps of 0.125 dB):
      0 to 36 dB
    • Digital TGC Engine
  • Programmable Gain Amplifier (PGA):
    • Gain: 21 dB, 24 dB, and 27 dB
  • Third-Order, Linear-Phase, Low-Pass Filter (LPF):
    • Cut-off Frequency From 10 MHz to 25 MHz
  • 16 ADCs Converting at 12-Bit, 80 MSPS or 10-Bit, 100 MSPS:
    • Each ADC Converts Two Sets of Inputs at Half Rate
    • 12-Bit Mode: 72-dBFS SNR
    • 10-Bit Mode: 61-dBFS SNR
  • TGC Mode Power w/o digital I/Q Demodulator:
    • Lowest Power of 18.5 mW/Ch in Low Power Mode, 4 nV/rtHz, 10-Bit, 20 MSPS, LVDS (2x rate)
    • 27.8 mW/Ch at 3 nV/rtHz in Low Noise Mode at 12-Bit, 40 MSPS
    • 24.4 mW/Ch at 4 nV/rtHz in Low Power Mode at 12-Bit, 40 MSPS
  • Excellent Device-to-Device Gain Matching:
    • ±0.5 dB (Typical)
  • Harmonic Distortion: –55 dBc level
  • Fast and Consistent Overload Recovery
  • Continuous Wave (CW) Path With:
    • Low Close-In Phase Noise of –148 dBc/Hz at 1-kHz Frequency Offset off 5-MHz Carrier
    • Power Consumption w/o Signal: 10 mW/Ch
    • Phase Resolution: λ/16
    • 12-dB Suppression on Third and Fifth Harmonics
  • Digital I/Q demodulator:
    • Decimation Filter M = 1 to 63
    • Data Throughput Reduction After Decimation
    • On-Chip RAM with 32 Preset Profiles
  • LVDS Interface with a Speed Up to 1-Gbps
  • Small Package: 15-mm × 15-mm NFBGA-289
  • 32-Channel AFE for Ultrasound Applications:
    • LNA, Attenuator, LPF, ADC, CW Mixer, and Digital I/Q Demodulator
    • Digital Time Gain Compensation (DTGC)
    • Total Gain Range: 0 dB to 48 dB
  • Low-Noise Amplifier (LNA) With Programmable Gain:
    • Low Current Noise of 1pA/rtHz
    • Gain: 21 dB, 18 dB, and 15 dB
    • Linear Input Range: up to 700 mVPP
  • Programmable Attenuator (ATTEN):
    • Attenuation Range (Steps of 0.125 dB):
      0 to 36 dB
    • Digital TGC Engine
  • Programmable Gain Amplifier (PGA):
    • Gain: 21 dB, 24 dB, and 27 dB
  • Third-Order, Linear-Phase, Low-Pass Filter (LPF):
    • Cut-off Frequency From 10 MHz to 25 MHz
  • 16 ADCs Converting at 12-Bit, 80 MSPS or 10-Bit, 100 MSPS:
    • Each ADC Converts Two Sets of Inputs at Half Rate
    • 12-Bit Mode: 72-dBFS SNR
    • 10-Bit Mode: 61-dBFS SNR
  • TGC Mode Power w/o digital I/Q Demodulator:
    • Lowest Power of 18.5 mW/Ch in Low Power Mode, 4 nV/rtHz, 10-Bit, 20 MSPS, LVDS (2x rate)
    • 27.8 mW/Ch at 3 nV/rtHz in Low Noise Mode at 12-Bit, 40 MSPS
    • 24.4 mW/Ch at 4 nV/rtHz in Low Power Mode at 12-Bit, 40 MSPS
  • Excellent Device-to-Device Gain Matching:
    • ±0.5 dB (Typical)
  • Harmonic Distortion: –55 dBc level
  • Fast and Consistent Overload Recovery
  • Continuous Wave (CW) Path With:
    • Low Close-In Phase Noise of –148 dBc/Hz at 1-kHz Frequency Offset off 5-MHz Carrier
    • Power Consumption w/o Signal: 10 mW/Ch
    • Phase Resolution: λ/16
    • 12-dB Suppression on Third and Fifth Harmonics
  • Digital I/Q demodulator:
    • Decimation Filter M = 1 to 63
    • Data Throughput Reduction After Decimation
    • On-Chip RAM with 32 Preset Profiles
  • LVDS Interface with a Speed Up to 1-Gbps
  • Small Package: 15-mm × 15-mm NFBGA-289

The AFE58JD32LP is a highly integrated, analog front-end (AFE) solution specifically designed for portable ultrasound systems where high performance, low power, and small size are required.

The device is realized through a multichip module (MCM) with two dies: 1 VCA die and 1 ADC die. The VCA die has 32 channels that interface with the 16 channels of the ADC die. Each ADC channel alternately converts an odd and an even VCA channel.

Each channel in the VCA die can be configured in either of two modes: time-gain-compensation (TGC) mode or continuous wave (CW) mode. In the TGC mode, each channel includes a low-noise amplifier (LNA), a programmable attenuator (ATTEN), a programmable gain amplifier and a third-order, low-pass filter (LPF). The LNA gain is programmable to 21 dB, 18 dB, or 15 dB. The ATTEN supports an attenuation range of 0 dB to 36 dB, with digital control for the attenuation. The PGA provides gain options from 21 dB to 27 dB in steps of 3 dB. The LPF cutoff frequency can be set between 10 MHz and 25 MHz to support ultrasound applications with different frequencies. In the CW mode, the output of the LNA goes to a low-power passive mixer with 16 selectable phase delays. Different phase delays can be applied to each analog input signal to perform an on-chip beamforming operation. A harmonic filter in the CW mixer suppresses the third and fifth harmonic to enhance the sensitivity of the CW Doppler measurement.

The 16 channels of the ADC die can be configured to operate with a resolution of 12 bits or 10 bits. The ADC resolution can be traded off with conversion rate and can operate at maximum speeds of 80 MSPS and 100 MSPS at 12-bit and 10-bit resolution, respectively. Because each ADC alternately converts two VCA channels, the resulting maximum sample rate of each of the 32 channels of the AFE is 40 MSPS and 50 MSPS in the 12-bit and 10-bit modes, respectively. The ADC is designed to scale its power with sampling rate. The output interface of the ADC comes out through a low-voltage differential signaling (LVDS), which can easily interface with low-cost field-programmable gate arrays (FPGAs).

A very low-power AFE solution makes it suitable for system with strict battery-life requirement.

The AFE is available in a 15 mm × 15 mm 289-pin NFBGA package and is pin-compatible with the AFE5832 family.

The AFE58JD32LP is a highly integrated, analog front-end (AFE) solution specifically designed for portable ultrasound systems where high performance, low power, and small size are required.

The device is realized through a multichip module (MCM) with two dies: 1 VCA die and 1 ADC die. The VCA die has 32 channels that interface with the 16 channels of the ADC die. Each ADC channel alternately converts an odd and an even VCA channel.

Each channel in the VCA die can be configured in either of two modes: time-gain-compensation (TGC) mode or continuous wave (CW) mode. In the TGC mode, each channel includes a low-noise amplifier (LNA), a programmable attenuator (ATTEN), a programmable gain amplifier and a third-order, low-pass filter (LPF). The LNA gain is programmable to 21 dB, 18 dB, or 15 dB. The ATTEN supports an attenuation range of 0 dB to 36 dB, with digital control for the attenuation. The PGA provides gain options from 21 dB to 27 dB in steps of 3 dB. The LPF cutoff frequency can be set between 10 MHz and 25 MHz to support ultrasound applications with different frequencies. In the CW mode, the output of the LNA goes to a low-power passive mixer with 16 selectable phase delays. Different phase delays can be applied to each analog input signal to perform an on-chip beamforming operation. A harmonic filter in the CW mixer suppresses the third and fifth harmonic to enhance the sensitivity of the CW Doppler measurement.

The 16 channels of the ADC die can be configured to operate with a resolution of 12 bits or 10 bits. The ADC resolution can be traded off with conversion rate and can operate at maximum speeds of 80 MSPS and 100 MSPS at 12-bit and 10-bit resolution, respectively. Because each ADC alternately converts two VCA channels, the resulting maximum sample rate of each of the 32 channels of the AFE is 40 MSPS and 50 MSPS in the 12-bit and 10-bit modes, respectively. The ADC is designed to scale its power with sampling rate. The output interface of the ADC comes out through a low-voltage differential signaling (LVDS), which can easily interface with low-cost field-programmable gate arrays (FPGAs).

A very low-power AFE solution makes it suitable for system with strict battery-life requirement.

The AFE is available in a 15 mm × 15 mm 289-pin NFBGA package and is pin-compatible with the AFE5832 family.

다운로드 스크립트와 함께 비디오 보기 동영상
추가 정보 요청

NDA에 따라 전체 데이터시트 및 기타 설계 리소스를 사용할 수 있습니다. 지금 요청

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.
1개 모두 보기
유형 직함 날짜
* Data sheet AFE58JD32LP 32-Channel Ultrasound AFE With 18.5-mW/Channel Power, 4-nV/√Hz, 12-Bit, 40-MSPS or 10-Bit, 50-MSPS Output and Passive CW Mixer, LVDS and JESD204B Interface, and Digital Demodulator datasheet PDF | HTML 2020/03/22

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

AFE58JD32LPEVM — JESD204B 및 LVDS 인터페이스를 지원하는 AFE58JD32LP 32채널 초음파 AFE 평가 모듈

AFE58JD32LP 평가 모듈(EVM)은 뛰어난 성능과 작은 크기가 필요한 초음파 시스템을 위해 특별히 설계된 고집적 아날로그 프론트 엔드(AFE) 솔루션인 AFE58JD32LP 제품을 평가하기 위한 플랫폼입니다. AFE58JD32LP은 완전한 타임 게인 제어(TGC) 영상 경로와 연속파 도플러(CWD) 경로를 통합하였습니다.

32채널 AFE58JD32LP를 사용하면 최적의 시스템 성능을 위해 다양한 전력 및 잡음 조합을 구현할 수 있습니다. 따라서 AFE58JD32LP는 휴대형 시스템에 적합한 초음파 AFE 솔루션입니다.

시뮬레이션 툴

PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®

TI용 PSpice®는 아날로그 회로의 기능을 평가하는 데 사용되는 설계 및 시뮬레이션 환경입니다. 완전한 기능을 갖춘 이 설계 및 시뮬레이션 제품군은 Cadence®의 아날로그 분석 엔진을 사용합니다. 무료로 제공되는 TI용 PSpice에는 아날로그 및 전력 포트폴리오뿐 아니라 아날로그 행동 모델에 이르기까지 업계에서 가장 방대한 모델 라이브러리 중 하나가 포함되어 있습니다.

TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
패키지 CAD 기호, 풋프린트 및 3D 모델
NFBGA (ZAV) 289 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

동영상