CD74HC08-EP

Name: CD74HC08-EP
Brand: TI
SKU: CD74HC08-EP
Price: 1.061 USD

활성

향상된 제품, 4채널, 2입력 2V~6V 5.2mA 드라이브 강도 AND 게이트

지금 주문

데이터 시트

document-pdfAcrobat CD74HC08-EP datasheet (Rev. B) (영어)

CD74HC08-EP

활성

데이터 시트

지금 주문

제품 상세 정보

Technology family

HC

Supply voltage (min) (V)

2

Supply voltage (max) (V)

6

Number of channels

4

Inputs per channel

2

IOL (max) (mA)

5.2

IOH (max) (mA)

-5.2

Input type

Standard CMOS

Output type

Push-Pull

Features

High speed (tpd 10- 50ns)

Data rate (max) (Mbps)

28

Rating

HiRel Enhanced Product

Operating temperature range (°C)

-40 to 125

Technology family

HC

Supply voltage (min) (V)

2

Supply voltage (max) (V)

6

Number of channels

4

Inputs per channel

2

IOL (max) (mA)

5.2

IOH (max) (mA)

-5.2

Input type

Standard CMOS

Output type

Push-Pull

Features

High speed (tpd 10- 50ns)

Data rate (max) (Mbps)

28

Rating

HiRel Enhanced Product

Operating temperature range (°C)

-40 to 125

SOIC (D)

14

51.9 mm² 8.65 x 6

Controlled Baseline
- One Assembly/Test Site, One Fabrication Site
Extended Temperature Performance of –55°C to 125°C
Enhanced Diminishing Manufacturing Sources (DMS) Support
Enhanced Product-Change Notification
Qualification Pedigree
Buffered Inputs
Typical Propagation Delay 7 ns at V_CC = 5 V, C_L = 15 pF, T_A = 25°C
Fanout (Over Temperature Range)
- Standard Outputs ... 10 LSTTL Loads
- Bus Driver Outputs ... 15 LSTTL Loads
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL Logic ICs
2-V to 6-V V_CC Operation
High Noise Immunity N_IL or N_IH = 30% of V_CC at V_CC = 5 V
CMOS Input Compatibility, I_l 1 µA at V_OL, V_OH

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

Controlled Baseline
- One Assembly/Test Site, One Fabrication Site
Extended Temperature Performance of –55°C to 125°C
Enhanced Diminishing Manufacturing Sources (DMS) Support
Enhanced Product-Change Notification
Qualification Pedigree
Buffered Inputs
Typical Propagation Delay 7 ns at V_CC = 5 V, C_L = 15 pF, T_A = 25°C
Fanout (Over Temperature Range)
- Standard Outputs ... 10 LSTTL Loads
- Bus Driver Outputs ... 15 LSTTL Loads
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL Logic ICs
2-V to 6-V V_CC Operation
High Noise Immunity N_IL or N_IH = 30% of V_CC at V_CC = 5 V
CMOS Input Compatibility, I_l 1 µA at V_OL, V_OH

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

The CD74HC08 logic gates utilize silicon-gate CMOS technology to achieve operating speeds similar to LSTTL gates, with the low power consumption of standard CMOS integrated circuits. All devices can drive 10 LSTTL loads.

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