홈 클록 및 타이밍 클록 생성기
홈
클록 및 타이밍
클록 생성기

CDCE937-Q1

활성

2.5V 또는 3.3V LVCMOS 출력을 지원하는 차량용 카탈로그 프로그래머블 3-PLL VCXO 클록 신시사이저

지금 주문
데이터 시트

CDCE937-Q1

활성
데이터 시트 지금 주문

제품 상세 정보

Function Clock generator, Spread-spectrum clock generator Number of outputs 7 Output frequency (max) (MHz) 230 Core supply voltage (V) 1.8 Output supply voltage (V) 2.5, 3.3 Input type LVCMOS, XTAL Output type LVCMOS Operating temperature range (°C) -40 to 125 Features I2C, Integrated EEPROM, Pin programmable, Spread-spectrum clocking (SSC) Rating Automotive
Function Clock generator, Spread-spectrum clock generator Number of outputs 7 Output frequency (max) (MHz) 230 Core supply voltage (V) 1.8 Output supply voltage (V) 2.5, 3.3 Input type LVCMOS, XTAL Output type LVCMOS Operating temperature range (°C) -40 to 125 Features I2C, Integrated EEPROM, Pin programmable, Spread-spectrum clocking (SSC) Rating Automotive
TSSOP (PW) 20 41.6 mm² 6.5 x 6.4
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C4B
  • In-System Programmability and EEPROM
    • Serial Programmable Volatile Register
    • Nonvolatile EEPROM to Store Customer Setting
  • Flexible Input Clocking Concept
    • External Crystal: 8 MHz to 32 MHz
    • On-Chip VCXO: Pull Range ±150 ppm
    • Single-Ended LVCMOS up to 160 MHz
  • Free Selectable Output Frequency up to 230  MHz
  • Low-Noise PLL Core
    • Integrated PLL Loop Filter Components
    • Low Period Jitter (Typical 60 ps)
  • Separate Output Supply Pins
    • CDCE937-Q1: 3.3 V and 2.5 V
    • CDCEL937-Q1: 1.8 V
  • Flexible Clock Driver
    • Three User-Definable Control Inputs [S0/S1/S2]; for Example: SSC Selection, Frequency Switching, Output Enable or Power Down
    • Generates Highly Accurate Clocks for Video, Audio, USB, IEEE1394, RFID, Bluetooth™, WLAN, Ethernet™, and GPS
    • Generates Common Clock Frequencies Used With TI-DaVinci™, OMAP™, DSPs
    • Programmable SSC Modulation
    • Enables 0-PPM Clock Generation
  • 1.8-V Device Power Supply
  • Wide Temperature Range –40°C to 125°C
  • Packaged in TSSOP
  • Development and Programming Kit for Easy PLL Design and Programming (TI Pro-Clock™)
  • APPLICATIONS
    • Clusters
    • Head Units
    • Navigation Systems
    • Advanced Driver Assistance Systems (ADAS)

All other trademarks are the property of their respective owners.
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C4B
  • In-System Programmability and EEPROM
    • Serial Programmable Volatile Register
    • Nonvolatile EEPROM to Store Customer Setting
  • Flexible Input Clocking Concept
    • External Crystal: 8 MHz to 32 MHz
    • On-Chip VCXO: Pull Range ±150 ppm
    • Single-Ended LVCMOS up to 160 MHz
  • Free Selectable Output Frequency up to 230  MHz
  • Low-Noise PLL Core
    • Integrated PLL Loop Filter Components
    • Low Period Jitter (Typical 60 ps)
  • Separate Output Supply Pins
    • CDCE937-Q1: 3.3 V and 2.5 V
    • CDCEL937-Q1: 1.8 V
  • Flexible Clock Driver
    • Three User-Definable Control Inputs [S0/S1/S2]; for Example: SSC Selection, Frequency Switching, Output Enable or Power Down
    • Generates Highly Accurate Clocks for Video, Audio, USB, IEEE1394, RFID, Bluetooth™, WLAN, Ethernet™, and GPS
    • Generates Common Clock Frequencies Used With TI-DaVinci™, OMAP™, DSPs
    • Programmable SSC Modulation
    • Enables 0-PPM Clock Generation
  • 1.8-V Device Power Supply
  • Wide Temperature Range –40°C to 125°C
  • Packaged in TSSOP
  • Development and Programming Kit for Easy PLL Design and Programming (TI Pro-Clock™)
  • APPLICATIONS
    • Clusters
    • Head Units
    • Navigation Systems
    • Advanced Driver Assistance Systems (ADAS)

All other trademarks are the property of their respective owners.

The CDCE937-Q1 and CDCEL937-Q1 devices are modular, phase-locked loop (PLL) based programmable clock synthesizers. These devices provide flexible and programmable options, such as output clocks, input signals, and control pins, so that the user can configure the CDCEx937-Q1 for their own specifications.

The CDCEx937-Q1 generates up to seven output clocks from a single input frequency to enable both board space and cost savings. Additionally, with multiple outputs, the clock generator can replace multiple crystals with one clock generator. This makes the device well-suited for head unit and telematics applications in infotainment and camera systems in ADAS as these platforms are evolving into smaller and more cost effective systems.

Furthermore, each output can be programmed in-system for any clock frequency up to 230 MHz through the integrated, configurable PLL. The PLL also supports spread-spectrum clocking (SSC) with programmable down and center spread. This provides better electromagnetic interference (EMI) performance to enable customers to pass industry standards such as CISPR-25.

Customization of frequency programming and SSC are accessed using three user-defined control pins. This eliminates the additional interface requirement to control the clock. Specific power-up and power-down sequences can also be defined to the userΩs needs.

The CDCE937-Q1 and CDCEL937-Q1 devices are modular, phase-locked loop (PLL) based programmable clock synthesizers. These devices provide flexible and programmable options, such as output clocks, input signals, and control pins, so that the user can configure the CDCEx937-Q1 for their own specifications.

The CDCEx937-Q1 generates up to seven output clocks from a single input frequency to enable both board space and cost savings. Additionally, with multiple outputs, the clock generator can replace multiple crystals with one clock generator. This makes the device well-suited for head unit and telematics applications in infotainment and camera systems in ADAS as these platforms are evolving into smaller and more cost effective systems.

Furthermore, each output can be programmed in-system for any clock frequency up to 230 MHz through the integrated, configurable PLL. The PLL also supports spread-spectrum clocking (SSC) with programmable down and center spread. This provides better electromagnetic interference (EMI) performance to enable customers to pass industry standards such as CISPR-25.

Customization of frequency programming and SSC are accessed using three user-defined control pins. This eliminates the additional interface requirement to control the clock. Specific power-up and power-down sequences can also be defined to the userΩs needs.
filter 기타 클록 생성기 찾기
다운로드 스크립트와 함께 비디오 보기 동영상

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.
8개 모두 보기
유형 직함 날짜
* Data sheet CDCEx937-Q1 Programmable 3-PLL VCXO Clock Synthesizer With 1.8-V, 2.5-V, and 3.3-V LVCMOS Outputs datasheet (Rev. C) PDF | HTML 2016/12/16
Application note Crystal or Crystal Oscillator Replacement with Silicon Devices 2014/06/18
Application note VCXO Application Guideline for CDCE(L)9xx Family (Rev. A) 2012/04/23
User guide CDCE(L)9XX & CDCEx06 Programming Evaluation Module Manual (Rev. A) 2010/11/22
Application note General I2C / EEPROM usage for the CDCE(L)9xx family 2010/01/26
Application note Troubleshooting I2C Bus Protocol 2009/10/19
Application note Usage of I2C for CDCE(L)949, CDCE(L)937, CDCE(L)925, CDCE(L)913 2009/09/23
Application note Generating Low Phase-Noise Clocks for Audio Data Converters from Low Frequency 2008/03/31

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

설계 툴

CLOCK-TREE-ARCHITECT — 클록 트리 아키텍트 프로그래밍 소프트웨어

Clock tree architect is a clock tree synthesis tool that streamlines your design process by generating clock tree solutions based on your system requirements. The tool pulls data from an extensive database of clocking products to generate a system-level multi-chip clocking solution.
지금 설계하기
시뮬레이션 툴

PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®

TI용 PSpice®는 아날로그 회로의 기능을 평가하는 데 사용되는 설계 및 시뮬레이션 환경입니다. 완전한 기능을 갖춘 이 설계 및 시뮬레이션 제품군은 Cadence®의 아날로그 분석 엔진을 사용합니다. 무료로 제공되는 TI용 PSpice에는 아날로그 및 전력 포트폴리오뿐 아니라 아날로그 행동 모델에 이르기까지 업계에서 가장 방대한 모델 라이브러리 중 하나가 포함되어 있습니다.

TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
요청
패키지 핀 CAD 기호, 풋프린트 및 3D 모델
TSSOP (PW) 20 Ultra Librarian
TI의 평가 항목에 대한 표준 약관이 적용됩니다.

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

포럼 주제 모두 보기(영문)

콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

동영상