패키징 정보
| 패키지 | 핀 FCBGA (ACK) | 256 |
| 작동 온도 범위(°C) -40 to 85 |
| 패키지 수량 | 캐리어 90 | JEDEC TRAY (5+1) |
DAC39RFS12의 주요 특징
- 16-bit, 12/24GSPS, Multi-Nyquist DAC core
- Maximum input data rate:
- 8-bit, Single channel, DES mode: 24GSPS
- 12-bit, Single channel, DES mode: 15.5GSPS
- 16-bit, Single channel: 12GSPS
- 8-bit, Dual channel, 12GSPS
- 12-bit, Dual channel: 7.75GSPS/ch
- 16-bit, Dual channel: 6.2GSPS/ch
- Output bandwidth (–3dB): 12GHz
- Performance at fOUT = 2.997GHz, DES2XL
mode, DEM/Dither off
- Noise floor (small signal): –155dBFS/Hz
- SFDR (-0.1dBFS) : –60dBc
- IMD3 (-7dBFS each tone) : –60dBc
- Additive phase noise, 10 kHz offset: –137dBc/Hz
- Four integrated digital up-converters (DUC)
- Interpolation: 1x, 2x, 3x, 4x, 6x, 8x ... 256x
- Complex baseband DUC for I/Q output
- Complex to real up conversion for dual channel direct RF sampling
- 64-bit frequency resolution NCOs
- Fast reconfiguration interface for fast frequency hopping
- 4-bit data with 200MHz clock
- 60 ns reconfiguration (32-bit frequency)
- Any frequency hopping with phase coherence
- JESD204C Interface
- Up to 16 Lanes at up to 12.8Gbps
- Class C-S, Subclass-1 compatible
- Internal AC coupling capacitors
- SYSREF Windowing for automatic SYSREF timing calibration
DAC39RFS12에 대한 설명
The DAC39RF12 and ’RFS12 are a family of dual and single channel digital-to-analog converters (DAC) with 16-bit resolution. The devices can be used as non-interpolating or interpolating DACs for either direct RF sampling or complex baseband signal generation. The maximum input data rate is 24GSPS for a single channel or 12 GSPS for two channels. The devices can generate signals of up to 12, 7.5, and 6GHz signal bandwidth (8, 12, and 16-bit input resolution) at carrier frequencies exceeding 10GHz enabling direct sampling through C-band and into X-band.
The high sampling rate, output frequency range, 64-bit NCO frequency resolution and any frequency hopping with phase coherence also makes the device capable of arbitrary waveform generation (AWG) and direct digital synthesis (DDS).
A JESD204B and JESD204C compatible serial interface has 16 receiver pairs capable of up to 12.8Gbps. The interface is JESD204B and JESD204C subclass-1 compliant for deterministic latency and multi-device synchronization through the use of SYSREF.