DS90LV004
- 1.5 Gbps data rate per channel
- Configurable pre-emphasis drives lossy backplanes and cables
- Low output skew and jitter
- LVDS/CML/LVPECL compatible input, LVDS output
- On-chip 100Ω input and output termination
- 12 kV ESD protection on LVDS outputs
- Single 3.3V supply
- Very low power consumption
- Industrial -40 to +85°C temperature range
- Small TQFP Package Footprint
- Evaluation Kit Available
- See SCAN90004 for JTAG-enabled version
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The DS90LV004 is a four channel 1.5 Gbps LVDS buffer/repeater. High speed data paths and flow-through pinout minimize internal device jitter and simplify board layout, while configurable pre-emphasis overcomes ISI jitter effects from lossy backplanes and cables. The differential inputs interface to LVDS, and Bus LVDS signals such as those on TI's 10-, 16-, and 18- bit Bus LVDS SerDes, as well as CML and LVPECL. The differential inputs and outputs are internally terminated with a 100Ω resistor to improve performance and minimize board space. The repeater function is especially useful for boosting signals for longer distance transmission over lossy cables and backplanes.
기술 자료
| 상위 문서 | 유형 | 직함 | 형식 옵션 | 최신 영어 버전 다운로드 | 날짜 |
|---|---|---|---|---|---|
| * | 데이터 시트 | DS90LV004 4-Channel LVDS Buffer/Repeater with Pre-Emphasis datasheet (Rev. P) | 2013. 4. 17 | ||
| 애플리케이션 노트 | Signaling Rate vs. Distance for Differential Buffers | 2010. 1. 26 | |||
| 백서 | Overcoming Impedance Discontins in HS Signal Paths Using LVDS Sgnl Cnditionrs | 2006. 5. 1 | |||
| 애플리케이션 노트 | LVDS Signal Quality: Jitter Measurements Using Eye Patterns Test Report #1 | 1998. 10. 5 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| TQFP (PFB) | 48 | Ultra Librarian |
주문 및 품질
권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.