DS92001

활성

3.3V B/LVDS-BLVDS 버퍼

제품 상세 정보

Function Buffer Protocols BLVDS Number of transmitters 1 Number of receivers 1 Signaling rate (Mbps) 400 Input signal LVDS, LVTTL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Buffer Protocols BLVDS Number of transmitters 1 Number of receivers 1 Signaling rate (Mbps) 400 Input signal LVDS, LVTTL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 8 29.4 mm² (4.9 mm × 6 mm) WSON (NGK) 8 9 mm² (3 mm × 3 mm)
  • Single +3.3 V Supply
  • Receiver Inputs Accept LVDS/CML/LVPECL Signals
  • TRI-STATE Outputs
  • Receiver Input Threshold < ±100 mV
  • Fast Propagation Delay of 1.4 ns (typ)
  • Low Jitter 400 Mbps Fully Differential Data Path
  • Compatible with BLVDS 10-bit SerDes (40MHz)
  • Compatible with ANSI/TIA/EIA-644-A LVDS Standard
  • Available in SOIC and Space Saving WSON Package
  • Industrial Temperature Range

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  • Single +3.3 V Supply
  • Receiver Inputs Accept LVDS/CML/LVPECL Signals
  • TRI-STATE Outputs
  • Receiver Input Threshold < ±100 mV
  • Fast Propagation Delay of 1.4 ns (typ)
  • Low Jitter 400 Mbps Fully Differential Data Path
  • Compatible with BLVDS 10-bit SerDes (40MHz)
  • Compatible with ANSI/TIA/EIA-644-A LVDS Standard
  • Available in SOIC and Space Saving WSON Package
  • Industrial Temperature Range

All trademarks are the property of their respective owners.

The DS92001 B/LVDS-BLVDS Buffer takes a BLVDS input signal and provides a BLVDS output signal. In many large systems, signals are distributed across backplanes. One of the limiting factors for system speed is the "stub length" or the distance between the transmission line and the unterminated receivers on individual cards. Although it is generally recognized that this distance should be as short as possible to maximize system performance, real-world packaging concerns often make it difficult to make the stubs as short as the designer would like.

The DS92001 has edge transitions optimized for multidrop backplanes where the switching frequency is in the 200 MHz range or less. The output edge rate is critical in some systems where long stubs may be present, and utilizing a slow transition allows for longer stub lengths.

The DS92001, available in the WSON package, will allow the receiver inputs to be placed very close to the main transmission line, thus improving system performance.

A wide input dynamic range allows the DS92001 to receive differential signals from LVPECL, CML as well as LVDS sources. This will allow the device to also fill the role of an LVPECL-BLVDS or CML-BLVDS translator.

The DS92001 B/LVDS-BLVDS Buffer takes a BLVDS input signal and provides a BLVDS output signal. In many large systems, signals are distributed across backplanes. One of the limiting factors for system speed is the "stub length" or the distance between the transmission line and the unterminated receivers on individual cards. Although it is generally recognized that this distance should be as short as possible to maximize system performance, real-world packaging concerns often make it difficult to make the stubs as short as the designer would like.

The DS92001 has edge transitions optimized for multidrop backplanes where the switching frequency is in the 200 MHz range or less. The output edge rate is critical in some systems where long stubs may be present, and utilizing a slow transition allows for longer stub lengths.

The DS92001, available in the WSON package, will allow the receiver inputs to be placed very close to the main transmission line, thus improving system performance.

A wide input dynamic range allows the DS92001 to receive differential signals from LVPECL, CML as well as LVDS sources. This will allow the device to also fill the role of an LVPECL-BLVDS or CML-BLVDS translator.

다운로드 스크립트와 함께 비디오 보기 비디오

관심 가지실만한 유사 제품

open-in-new 대안 비교
다른 핀 출력을 지원하지만 비교 대상 장치와 동일한 기능.
TLV3607 활성 LVDS 출력을 지원하는 800ps 듀얼 고속 레일-레일 입력 콤퍼레이터 Lower power alternate
TLV3604 활성 LVDS 출력을 지원하는 800ps 고속 레일-레일 입력 콤퍼레이터 Lower power alternate
TLV3605 활성 LVDS 출력을 지원하는 800ps 고속 레일-레일 입력 콤퍼레이터 Lower power alternate

기술 자료

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* 데이터 시트 DS92001 3.3V B/LVDS-BLVDS Buffer datasheet (Rev. F) 2013. 4. 22

설계 및 개발

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패키지 CAD 기호, 풋프린트 및 3D 모델
SOIC (D) 8 Ultra Librarian
WSON (NGK) 8 Ultra Librarian

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