LM98640QML-SP

활성

Radiation-hardened, QML-V, Dual-channel 14-bit 40MSPS analog front end with LVDS output

제품 상세 정보

Resolution (Bits) 14 Number of channels 2 Sample rate (Msps) 40 Gain (min) (dB) -3.8 Gain (max) (dB) 18.4 Pd (typ) (mW) 356 Operating temperature range (°C) -55 to 125 Output data format LVDS Rating Space
Resolution (Bits) 14 Number of channels 2 Sample rate (Msps) 40 Gain (min) (dB) -3.8 Gain (max) (dB) 18.4 Pd (typ) (mW) 356 Operating temperature range (°C) -55 to 125 Output data format LVDS Rating Space
CQFP (NBB) 68 See data sheet
  • Radiation Hardened
    • TID 100 krad(Si)
    • Single Event Latch-Up (SEL) Immune to LET = 120 MeV-cm2/mg
    • Single Event Functional Interrupt (SEFI) Free to 120 MeV-cm2/mg
    • SMD 5962R1820301VXC
  • ADC Resolution: 14-Bit
  • ADC Sampling Rate: 5 MSPS to 40 MSPS
  • Input Level: 2.85 V
  • Supply Voltages 3.3 V and 1.8 V (Nominal)
    • 125 mW per Channel at 15 MSPS
    • 178 mW per Channel at 40 MSPS
  • CDS or S/H Processing for CCD or CIS Sensors
    • CDS or S/H Gain 0 dB or 6 dB
  • Programmable Analog Gain for Each Channel
    • 256 Steps; Range –3 dB to 18 dB
  • Programmable Analog Offset Correction
    • Fine and Coarse DAC Resolution ±8 Bits
    • Fine DAC Range ±5 mV
    • Coarse DAC Range ±250 mV
  • Programmable Input Clamp Voltage
  • Programmable Sample Edge: 1/64th Pixel Period
  • INL at 15 MHz: ±3.5 LSB
  • Noise Floor: –79 dB
  • Crosstalk: –80 dB
  • Operating Temp: –55°C to 125°C
  • Radiation Hardened
    • TID 100 krad(Si)
    • Single Event Latch-Up (SEL) Immune to LET = 120 MeV-cm2/mg
    • Single Event Functional Interrupt (SEFI) Free to 120 MeV-cm2/mg
    • SMD 5962R1820301VXC
  • ADC Resolution: 14-Bit
  • ADC Sampling Rate: 5 MSPS to 40 MSPS
  • Input Level: 2.85 V
  • Supply Voltages 3.3 V and 1.8 V (Nominal)
    • 125 mW per Channel at 15 MSPS
    • 178 mW per Channel at 40 MSPS
  • CDS or S/H Processing for CCD or CIS Sensors
    • CDS or S/H Gain 0 dB or 6 dB
  • Programmable Analog Gain for Each Channel
    • 256 Steps; Range –3 dB to 18 dB
  • Programmable Analog Offset Correction
    • Fine and Coarse DAC Resolution ±8 Bits
    • Fine DAC Range ±5 mV
    • Coarse DAC Range ±250 mV
  • Programmable Input Clamp Voltage
  • Programmable Sample Edge: 1/64th Pixel Period
  • INL at 15 MHz: ±3.5 LSB
  • Noise Floor: –79 dB
  • Crosstalk: –80 dB
  • Operating Temp: –55°C to 125°C

The LM98640QML-SP is a fully integrated, high performance 14-Bit, 5-MSPS to 40-MSPS signal processing solution. The Serial LVDS output format performs well during single event exposure, preventing data loss. The LM98640QML-SP has an adaptive power scaling feature to optimize power consumption based on the operating frequency and amount of gain required. High-speed signal throughput is achieved with an innovative architecture utilizing Correlated Double Sampling (CDS), typically employed with CCD arrays, or Sample and Hold (S/H) inputs (for CIS and CMOS image sensors). The sampling edges are programmable to a resolution of 1/64th of a pixel period. Both the CDS and S/H have a programmable gain of either 0 dB or 6 dB. The signal paths utilize two ±8-bit offset correction DACs for coarse and fine offset correction, and 8-bit Programmable Gain Amplifiers (PGA) that can be programmed independently for each input. The signals are then routed to two on chip 14-bit 40-MHz high performance analog-to-digital converters (ADC). The fully differential processing channel provides exceptional noise immunity, having a very low noise floor of –79 dB at 1x gain.

The LM98640QML-SP is a fully integrated, high performance 14-Bit, 5-MSPS to 40-MSPS signal processing solution. The Serial LVDS output format performs well during single event exposure, preventing data loss. The LM98640QML-SP has an adaptive power scaling feature to optimize power consumption based on the operating frequency and amount of gain required. High-speed signal throughput is achieved with an innovative architecture utilizing Correlated Double Sampling (CDS), typically employed with CCD arrays, or Sample and Hold (S/H) inputs (for CIS and CMOS image sensors). The sampling edges are programmable to a resolution of 1/64th of a pixel period. Both the CDS and S/H have a programmable gain of either 0 dB or 6 dB. The signal paths utilize two ±8-bit offset correction DACs for coarse and fine offset correction, and 8-bit Programmable Gain Amplifiers (PGA) that can be programmed independently for each input. The signals are then routed to two on chip 14-bit 40-MHz high performance analog-to-digital converters (ADC). The fully differential processing channel provides exceptional noise immunity, having a very low noise floor of –79 dB at 1x gain.

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기술 자료

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상위 문서 유형 직함 형식 옵션 최신 영어 버전 다운로드 날짜
* 데이터 시트 LM98640QML-SP Radiation Hardness Assured (RHA), Dual Channel, 14-Bit, 40-MSPS Analog Front End With LVDS Output datasheet (Rev. G) PDF | HTML 2018. 11. 28
* 방사능 및 안정성 보고서 LM98640QML SEE Report 2012. 5. 14
* 방사능 및 안정성 보고서 LM98640W-MLS SEE Report 2012. 5. 14
* 방사능 및 안정성 보고서 LM98640W-MLS TID Report 2012. 5. 14
* SMD LM98640QML-SP SMD 5962-18203 2020. 9. 22
선택 가이드 TI Space Products (Rev. L) 2026. 3. 27
Application brief DLA Approved Optimizations for QML Products (Rev. C) PDF | HTML 2025. 6. 17
애플리케이션 노트 Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. B) PDF | HTML 2025. 6. 10
추가 자료 TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. B) 2025. 2. 20
애플리케이션 노트 Single-Event Effects Confidence Interval Calculations (Rev. A) PDF | HTML 2022. 10. 19
e북 Radiation Handbook for Electronics (Rev. A) 2019. 5. 21
Application brief CCD and CMOS Imagers in Space: Signal Processing Challenges and Solutions 2018. 11. 5

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평가 보드

LM98640CVAL — 듀얼 채널, 14비트, 40MSPS 아날로그 프론트 엔드, LVDS 출력 포함

The LM98640CVAL Board is designed to allow quick evaluation and design development of TI's LM98640QML Analog Front End. This development board is designed to function in several different configurations.

The primary configuration connects the LM98640QML evaluation board to TI's Wavevision 5 Data (...)

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