제품 상세 정보

2nd harmonic (dBc) -73 3rd harmonic (dBc) -80 Frequency of harmonic distortion measurement (MHz) 200 Acl, min spec gain (V/V) 0.5 Architecture Fully Differential ADC Driver, VGA BW at Acl (MHz) 4500 Gain (max) (dB) 26 Gain (min) (dB) -6 Step size (dB) 1 Type RF VGA Iq per channel (typ) (mA) 69 Number of channels 1 Rating Catalog Operating temperature range (°C) -40 to 85 Slew rate (typ) (V/µs) 18200 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.25 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 4 Vs (min) (V) 4 Vs (max) (V) 5
2nd harmonic (dBc) -73 3rd harmonic (dBc) -80 Frequency of harmonic distortion measurement (MHz) 200 Acl, min spec gain (V/V) 0.5 Architecture Fully Differential ADC Driver, VGA BW at Acl (MHz) 4500 Gain (max) (dB) 26 Gain (min) (dB) -6 Step size (dB) 1 Type RF VGA Iq per channel (typ) (mA) 69 Number of channels 1 Rating Catalog Operating temperature range (°C) -40 to 85 Slew rate (typ) (V/µs) 18200 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.25 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 4 Vs (min) (V) 4 Vs (max) (V) 5
UQFN-HR (RMZ) 16 9 mm² 3 x 3
  • 3-dB Bandwidth: 4.5 GHz at 26-dB Gain
  • Gain Range: –6 dB to 26 dB in 1-dB Steps
  • Differential Input Impedance: 100 Ω
  • Differential Output with Common-Mode Control
  • Distortion at Max Gain (VO = 2 VPPD, RL = 200 Ω):
    • 200 MHz: HD2 at –73 dBc, HD3 at –80 dBc
    • 500 MHz: HD2 at –68 dBc, HD3 at –72 dBc
    • 1 GHz: HD2 at –63 dBc, HD3 at –63 dBc
    • 2 GHz: HD2 at –58 dBc, HD3 at –54 dBc
  • Output IP3:
    • 43 dBm at 200 MHz
    • 33 dBm at 1 GHz
    • 27 dBm at 2 GHz
  • Output IP2:
    • 67 dBm at 200 MHz
    • 60 dBm at 1 GHz
    • 52 dBm at 2 GHz
  • 8-dB Noise Figure at 1 GHz, RS = 100 Ω
  • 82-ps Rise, Fall Time Pulse Response
  • Supply Operation: 5.0 V at 69 mA
  • Supports Single- and (±) Split-Supply Operation:
    • DC- and AC-Coupled Applications
  • Fabricated on an Advanced Complementary BiCMOS Process
  • 3-mm × 3-mm UQFN-16 Package
  • 3-dB Bandwidth: 4.5 GHz at 26-dB Gain
  • Gain Range: –6 dB to 26 dB in 1-dB Steps
  • Differential Input Impedance: 100 Ω
  • Differential Output with Common-Mode Control
  • Distortion at Max Gain (VO = 2 VPPD, RL = 200 Ω):
    • 200 MHz: HD2 at –73 dBc, HD3 at –80 dBc
    • 500 MHz: HD2 at –68 dBc, HD3 at –72 dBc
    • 1 GHz: HD2 at –63 dBc, HD3 at –63 dBc
    • 2 GHz: HD2 at –58 dBc, HD3 at –54 dBc
  • Output IP3:
    • 43 dBm at 200 MHz
    • 33 dBm at 1 GHz
    • 27 dBm at 2 GHz
  • Output IP2:
    • 67 dBm at 200 MHz
    • 60 dBm at 1 GHz
    • 52 dBm at 2 GHz
  • 8-dB Noise Figure at 1 GHz, RS = 100 Ω
  • 82-ps Rise, Fall Time Pulse Response
  • Supply Operation: 5.0 V at 69 mA
  • Supports Single- and (±) Split-Supply Operation:
    • DC- and AC-Coupled Applications
  • Fabricated on an Advanced Complementary BiCMOS Process
  • 3-mm × 3-mm UQFN-16 Package

The LMH6401 is a wideband, digitally-controlled, variable-gain amplifier (DVGA) designed for dc to radio frequency (RF), intermediate frequency (IF), and high-speed time-domain applications. The device is an ideal analog-to-digital converter (ADC) driver for dc- or ac-coupled applications that require an automatic gain control (AGC).

Noise and distortion performance is optimized to drive ultra-wideband ADCs. The amplifier has an 8-dB noise figure at maximum gain and a –63-dBc harmonic distortion at 1 GHz for full-scale signal levels. The device supports both single- and split-supply operation for driving an ADC. A common-mode reference input pin is provided to align the amplifier output common-mode with the ADC input requirements.

Gain control is performed via an SPI™ interface, allowing a 32-dB gain range from –6 dB to 26 dB in 1-dB steps. A power-down feature is also available through the external PD pin or SPI control.

This level of performance is achieved at a low power level of 345 mW. The operating ambient temperature range is –40°C to 85°C.

The LMH6401 is a wideband, digitally-controlled, variable-gain amplifier (DVGA) designed for dc to radio frequency (RF), intermediate frequency (IF), and high-speed time-domain applications. The device is an ideal analog-to-digital converter (ADC) driver for dc- or ac-coupled applications that require an automatic gain control (AGC).

Noise and distortion performance is optimized to drive ultra-wideband ADCs. The amplifier has an 8-dB noise figure at maximum gain and a –63-dBc harmonic distortion at 1 GHz for full-scale signal levels. The device supports both single- and split-supply operation for driving an ADC. A common-mode reference input pin is provided to align the amplifier output common-mode with the ADC input requirements.

Gain control is performed via an SPI™ interface, allowing a 32-dB gain range from –6 dB to 26 dB in 1-dB steps. A power-down feature is also available through the external PD pin or SPI control.

This level of performance is achieved at a low power level of 345 mW. The operating ambient temperature range is –40°C to 85°C.

다운로드 스크립트와 함께 비디오 보기 동영상

기술 문서

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.
모두 보기8
유형 직함 날짜
* Data sheet LMH6401 DC to 4.5 GHz, Fully-Differential, Digital Variable-Gain Amplifier datasheet (Rev. A) PDF | HTML 2015/05/19
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017/03/28
Application note ADC32RF45: Amplifier to ADC Interface (Rev. A) 2016/09/07
Technical article Disentangle RF amplifier specs: output voltage/current and 1dB compression point PDF | HTML 2016/06/09
Technical article Disentangle RF amplifier specs: intermodulation distortion and intercept points PDF | HTML 2016/04/19
Technical article Disentangling RF amplifier specs: amplifier spot noise vs. noise figure PDF | HTML 2016/02/05
EVM User's guide TSW54J60 Evaluation Module User's Guide (Rev. A) 2015/09/21
EVM User's guide LMH6401 EVM User's Guide (Rev. A) 2015/05/29

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

LMH6401EVM — LMH6401 평가 모듈

The LMH6401 Evaluation module (EVM) is used to evaluate the single LMH6401, digitally-controlled variable-gain amplifier (DVGA) in a 16-lead high-performance RF package.  The EVM is designed to quickly and easily demonstrate the functionality and performance of LMH6401 across all the gain (...)

사용 설명서: PDF
TI.com에서 구매할 수 없습니다
평가 모듈(EVM)용 GUI

SBOC451 LMH6401EVM GUI

lock = 수출 승인 필요(1분)
지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어

제품
RF VGA
LMH6401 4.5GHz 초광대역 디지털 가변 게인 증폭기
하드웨어 개발
평가 보드
LMH6401EVM LMH6401 평가 모듈
시뮬레이션 모델

LMH6401 IBIS MODEL

SNOM552.ZIP (21 KB) - IBIS Model
시뮬레이션 모델

LMH6401 PSpice Model

SBOMBQ6.ZIP (67 KB) - PSpice Model
시뮬레이션 모델

LMH6401 TINA-TI Reference Design (Rev. A)

SBOM939A.TSC (58 KB) - TINA-TI Reference Design
시뮬레이션 모델

LMH6401 TINA-TI Spice Model

SBOM938.ZIP (14 KB) - TINA-TI Spice Model
레퍼런스 디자인

TIDA-01022 — DSO, 레이더, 5G 무선 테스트 시스템용 유연한 3.2GSPS 멀티 채널 AFE 레퍼런스 설계

This high speed multi-channel data capture reference design enables optimum system performance. System designers needs to consider critical design parameters like clock jitter and skew for high speed multi-channel clock generation, which affects overall system SNR, SFDR, channel to channel skew (...)
Design guide: PDF
회로도: PDF
레퍼런스 디자인

TIDA-01028 — 고속 오실로스코프 및 광대역 디지타이저를 위한 12.8GSPS 아날로그 프론트 엔드 레퍼런스 설계

This reference design provides a practical example of interleaved RF-sampling analog-to-digital converters (ADCs) to achieve a 12.8-GSPS sampling rate. This is done by time interleaving two RF-sampling ADCs. Interleaving requires a phase shift between the ADCs, which this reference design achieves (...)
Design guide: PDF
회로도: PDF
레퍼런스 디자인

TIDA-010128 — 12비트 디지타이저용 확장 가능한 20.8GSPS 레퍼런스 설계

This reference design describes a 20.8 GSPS sampling system using RF sampling analog-to-digital converters (ADCs) in time interleaved configuration. Time interleaving method is a proven and traditional way of increasing sample rate, however, matching individual ADCs offset, gain and sampling time (...)
Design guide: PDF
회로도: PDF
레퍼런스 디자인

TIDA-010122 — 멀티 채널 RF 시스템용 데이터 컨버터 DDC 및 NCO 기능을 동기화하는 레퍼런스 설계

이 레퍼런스 설계는 mMIMO(massive multiple input multiple output, 대규모 다중 입력 다중 출력), 위상 어레이 레이더 및 통신 페이로드 같은 새로운 5G 적응 애플리케이션과 관련한 동기화 설계 문제를 해결합니다. 일반적인 RF 프런트 엔드에는 아날로그 도메인에서 안테나 LNA(저잡음 증폭기), 믹서, LO(로컬 오실레이터), 디지털 도메인에서 아날로그-디지털 컨버터, NCO(숫자 제어 오실레이터) 및 DDC(디지털 다운 컨버터) 등이 포함되어 있습니다. 전체 시스템 동기화를 달성하려면 이 디지털 (...)
Design guide: PDF
회로도: PDF
레퍼런스 디자인

TIDA-00823 — AC 및 DC 결합 고정 게인 증폭기를 지원하는 16비트 1GSPS 디지타이저 레퍼런스 디자인

This reference design discusses the use and performance of the Ultra-Wideband, Fixed-gain high-speed amplifier, the LMH3401 to drive the high-speed analog-to-digital converter (ADC), the ADS54J60 device. Different options for common-mode voltages, power supplies, and interfaces are discussed and (...)
Design guide: PDF
회로도: PDF
레퍼런스 디자인

TIDA-00826 — 50Ohm, 2GHz 오실로스코프 프론트 엔드 레퍼런스 디자인

This reference design is part of an analog front-end for 50Ω-input oscilloscope application. System designers can readily use this evaluation platform to process input signals from DC to 2 GHz in both frequency-domain and time-domain applications.
Design guide: PDF
회로도: PDF
레퍼런스 디자인

TIDA-00822 — AC 및 DC 결합 가변 게인 증폭기를 지원하는 16비트 1GSPS 디지타이저 레퍼런스 디자인

This reference design discusses the use and performance of the Digital Variable-Gain high-speed amplifier, the LMH6401, to drive the high-speed analog-to-digital converter (ADC), the ADS54J60 device. Different options for common-mode voltages, power supplies, and interfaces are discussed and (...)
Design guide: PDF
회로도: PDF
레퍼런스 디자인

TIDA-00654 — 계단식 LMH5401 및 LMH6401 레퍼런스 디자인

DC 및 AC 결합 애플리케이션 모두에 광대역 단일 종단-차동 변환 레퍼런스 디자인이 제공됩니다. 이 설계는 LMH5401 및 LMH6401 캐스케이드 성능을 평가하고 설계에 대한 통찰력을 제공합니다.
Design guide: PDF
회로도: PDF
패키지 다운로드
UQFN-HR (RMZ) 16 옵션 보기

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

동영상