TIDA-01028

12.8-GSPS analog front end reference design for high-speed oscilloscope and wide-band digitizer

Design files

TIDA-01028

Design files

Overview

This reference design provides a practical example of interleaved RF-sampling analog-to-digital converters (ADCs) to achieve a 12.8-GSPS sampling rate. This is done by time interleaving two RF-sampling ADCs. Interleaving requires a phase shift between the ADCs, which this reference design achieves using the Noiseless Aperture Delay Adjustment (tAD Adjust) feature of the ADC12DJ3200. This feature is also used to minimize mismatches typical of interleaved ADCs: maximizing SNR, ENOB and SFDR performance. A low-phase noise clocking tree with JESD204B support is also featured on this reference design. It is implemented using the LMX2594 wideband PLL and the LMK04828 synthesizer and jitter cleaner.

Features

Sampling rate up to 12.8 GSPS, using time interleaved 12-bit RF-sampling ADCs
Analog front end support up to 6-GHz bandwidth
Fine sample clock phase adjustment (19-fs resolution)
Phase synchronization of multiple ADCs
Companion power reference design with a >85% efficiency at 12-V input
JESD204B supporting 8-, 16-, or 32-JESD lanes and data rates up to 12.8 Gbps per lane

Industrial

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Design files & products

Design files

Download ready-to-use system files to speed your design process.

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Design guide — TIDA-01028

TIDUEI2.PDF (6296 KB)

Reference design overview and verified performance test data

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Assembly drawing — TIDA-01028

TIDRZ72.PDF (2941 KB)

Detailed overview of design layout for component placement

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Bill of materials (BOM) — TIDA-01028

TIDRZ71A.PDF (241 KB)

Complete listing of design components, reference designators, and manufacturers/part numbers

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CAD/CAE symbol — TIDA-01028

TIDRZ74.ZIP (41929 KB)

Files used for 3D models or 2D drawings of IC components

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Gerber file — TIDA-01028

TIDCFC2.ZIP (13521 KB)

Design file that contains information on physical board layer of design PCB

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PCB layout — TIDA-01028

TIDRZ73.PDF (28699 KB)

PCB layer plot file used for generating PCB design layout

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Schematic — TIDA-01028

TIDRZ70.PDF (4790 KB)

Detailed schematic diagram for design layout and components

Products

Includes TI products in the design and potential alternatives.

LVDS, M-LVDS & PECL ICs

DS90LV028AQ-Q1 — Automotive LVDS dual differential line receiver

Data sheet: PDF | HTML

Clock jitter cleaners

LMK04828 — Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 2370 to 2630-MHz VCO0.

Data sheet: PDF | HTML

Clock buffers

LMK00304 — 3.1-GHz differential clock buffer/level translator with 4 configurable outputs

Data sheet: PDF | HTML

AND gates

SN74LVC1G08 — 1-ch, 2-input 1.65-V to 5.5-V 32 mA drive strength AND gate

Data sheet: PDF | HTML

Linear & low-dropout (LDO) regulators

TPS7A84 — 3-A, low-VIN, low-noise, ultra-low-dropout voltage regulator with power good with high-accuracy

Data sheet: PDF | HTML

MOSFETs

CSD15571Q2 — 20-V, N channel NexFET™ power MOSFET, single SON 2 mm x 2 mm, 19.2 mOhm

Data sheet: PDF

High-speed ADCs (≥10 MSPS)

ADC12DJ3200 — 12-bit, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling analog-to-digital converter (ADC)

Data sheet: PDF | HTML

RF variable gain amplifiers (VGAs)

LMH6401 — 4.5 GHz ultra wideband digital variable gain amplifier

Data sheet: PDF | HTML

RF fully differential amplifiers (FDAs)

LMH5401 — 8-GHz Ultra wideband fully differential amplifier

Data sheet: PDF | HTML

Oscillators

LMK61E2 — Ultra-low jitter, EEPROM programmable oscillator for medical imaging and test and measurement

Data sheet: PDF | HTML

Analog & precision switches & muxes

SN74LVC2G53 — 5V, 2:1 (SPDT), 1-channel, analog switch

Data sheet: PDF | HTML

Voltage translators

SN74AVC4T774 — Four-bit dual-supply bus transceiver with configurable voltage-level shifting and tri-state outputs

Data sheet: PDF | HTML

Digital temperature sensors

LM95233 — ±2°C Dual Remote and Local Temperature Sensor with TruTherm Technology and SMBus Interface

Data sheet: PDF

LVDS, M-LVDS & PECL ICs

DS90LT012AQ-Q1 — Automotive LVDS differential line receiver

Data sheet: PDF

eFuses (integrated hot swaps)

TPS25926 — 4.5-V to 13.8-V, 30mΩ, 2-5A eFuse

Data sheet: PDF | HTML

Noninverting buffers & drivers

SN74LVC1G125 — Single 1.65-V to 5.5-V buffer with 3-state outputs

Data sheet: PDF | HTML

Linear & low-dropout (LDO) regulators

TLV702 — 300-mA, high-PSRR, low-IQ, low-dropout voltage regulator with enable

Data sheet: PDF | HTML

Comparators

LMC6762 — Dual Micro-Power Rail-to-Rail Input CMOS Comparator with Push-Pull Output

Data sheet: PDF | HTML

High-speed ADCs (≥10 MSPS)

ADC12DJ5200RF — RF-sampling 12-bit ADC with dual-channel 5.2 GSPS or single-channel 10.4 GSPS

Data sheet: PDF | HTML

I2C & SPI general-purpose I/Os (GPIOs)

TCA9534A — 8-bit 1.65- to 5.5-V I2C/SMBus I/O expander with interrupt, & config registers

Data sheet: PDF | HTML

Power modules (integrated inductor)

TPS82130 — 17-V input 3-A step-down converter module with integrated inductor

Data sheet: PDF | HTML

Linear & low-dropout (LDO) regulators

TPS7A33 — 1-A, high-PSRR, negative, adjustable low-dropout voltage regulator with enable

Data sheet: PDF | HTML

RF PLLs & synthesizers

LMX2594 — 15-GHz wideband PLLatinum™ RF synthesizer with phase synchronization and JESD204B support

Data sheet: PDF | HTML

Linear & low-dropout (LDO) regulators

TPS7A8300 — 2-A, low-VIN, low-2-A, low-VIN, low-noise, ultra-low-dropout voltage regulator with power good wi

Data sheet: PDF | HTML

Start development

Hardware development

Evaluation board

ADC12DJ3200EVM — ADC12DJ3200 12-bit, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling ADC evaluation module

This reference design provides a practical example of interleaved RF-sampling analog-to-digital converters (ADCs) to achieve a 12.8-GSPS sampling rate. This is done by time interleaving two RF-sampling ADCs. Interleaving requires a phase shift between the ADCs, which this reference design achieves (...)

EVM user’s guide: PDF

Supported products & hardware

Hardware development

Reference design

TIDA-010122 — Reference design synchronizing data converter DDC and NCO features for multi-channel RF systems

TIDA-01021 — Multi-channel JESD204B 15-GHz clocking reference design for DSO, radar and 5G wireless testers

TIDA-01022 — Flexible 3.2-GSPS multi-channel AFE reference design for DSOs, radar and 5G wireless test systems

TIDA-01023 — High Channel Count JESD204B Clock Generation Reference Design for RADAR and 5G Wireless Testers

TIDA-01024 — High Channel Count JESD204B Daisy Chain Clock Reference Design for RADAR and 5G Wireless Testers

TIDA-01028 — 12.8-GSPS analog front end reference design for high-speed oscilloscope and wide-band digitizer

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ADC12DJ3200EVM — ADC12DJ3200 12-bit, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling ADC evaluation module

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Hardware development

Reference design

TIDA-010122 — Reference design synchronizing data converter DDC and NCO features for multi-channel RF systems

TIDA-01021 — Multi-channel JESD204B 15-GHz clocking reference design for DSO, radar and 5G wireless testers

TIDA-01022 — Flexible 3.2-GSPS multi-channel AFE reference design for DSOs, radar and 5G wireless test systems

TIDA-01023 — High Channel Count JESD204B Clock Generation Reference Design for RADAR and 5G Wireless Testers

TIDA-01024 — High Channel Count JESD204B Daisy Chain Clock Reference Design for RADAR and 5G Wireless Testers

TIDA-01028 — 12.8-GSPS analog front end reference design for high-speed oscilloscope and wide-band digitizer

Evaluation board

TSW14J57EVM — Data capture/pattern generator: data converter EVM with 16 JESD204B lanes from 1.6-15Gbps

This reference design provides a practical example of interleaved RF-sampling analog-to-digital converters (ADCs) to achieve a 12.8-GSPS sampling rate. This is done by time interleaving two RF-sampling ADCs. Interleaving requires a phase shift between the ADCs, which this reference design achieves (...)

Supported products & hardware

Hardware development

Reference design

TIDA-010122 — Reference design synchronizing data converter DDC and NCO features for multi-channel RF systems

TIDA-010128 — Scalable 20.8 GSPS reference design for 12 bit digitizers

TIDA-010131 — Multichannel RF transceiver clocking reference design for RADARs and wireless 5G testers

TIDA-010132 — Multichannel RF transceiver reference design for radar applications

TIDA-01022 — Flexible 3.2-GSPS multi-channel AFE reference design for DSOs, radar and 5G wireless test systems

TIDA-01027 — Low-noise power supply reference design maximizing performance in 12.8-GSPS data acquisition systems

TIDA-01028 — 12.8-GSPS analog front end reference design for high-speed oscilloscope and wide-band digitizer

TIDA-01442 — Direct RF-Sampling Radar Receiver for L-, S-, C-, and X-Band Using ADC12DJ3200 Reference Design

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