SCAN90CP02
- 1.5 Gbps per Channel
- Low Power: 70 mA in Dual Repeater Mode @1.5 Gbps
- Low Output Jitter
- Configurable 0/25/50/100% Pre-Emphasis Drives Lossy Backplanes and Cables
- Non-Blocking Architecture Allows 1:2 Splitter, 2:1 Mux, Crossover, and Dual Buffer Configurations
- Flow-Through Pinout
- LVDS/BLVDS/CML/LVPECL Inputs, LVDS Outputs
- IEEE 1149.1 and 1149.6 Compliant
- Single 3.3V Supply
- Separate Control of Inputs and Outputs Allows for Power Savings
- Industrial -40 to +85°C Temperature Range
- 28-Lead UQFN Package, or 32-Lead LQFP Package
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The SCAN90CP02 is a 1.5 Gbps 2 x 2 LVDS crosspoint switch. High speed data paths and flow-through pinout minimize internal device jitter, while configurable 0/25/50/100% pre-emphasis overcomes external ISI jitter effects of lossy backplanes and cables. The differential inputs interface to LVDS and Bus LVDS signals such as those on TI's 10-, 16-, and 18- bit Bus LVDS SerDes, as well as CML and LVPECL. The SCAN90CP02 can also be used with ASICs and FPGAs. The non-blocking crosspoint architecture is pin-configurable as a 1:2 clock or data splitter, 2:1 redundancy mux, crossover function, or dual buffer for signal booster and stub hider applications.
Integrated IEEE 1149.1 (JTAG) and 1149.6 circuitry supports testability of both single-ended LVTTL/CMOS and differential LVDS PCB interconnect. The 3.3V supply, CMOS process, and LVDS I/O ensure high performance at low power over the entire industrial -40 to +85°C temperature range.
기술 자료
| 상위 문서 | 유형 | 직함 | 형식 옵션 | 최신 영어 버전 다운로드 | 날짜 |
|---|---|---|---|---|---|
| * | 데이터 시트 | SCAN90CP02 1.5 Gbps 2x2 LVDS Crosspoint Switch w/Pre-Emphasis & IEEE 1149.6 datasheet (Rev. M) | 2013. 4. 12 | ||
| 애플리케이션 노트 | AN-1313 SCAN90CP02 Design for Test Features (Rev. C) | 2013. 4. 26 | |||
| 사용 설명서 | SCAN90CP02 2x2 LVDS Cross-point Switch Evaluation Kit | 2012. 2. 21 |
설계 및 개발
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| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| UQFN (NJD) | 28 | Ultra Librarian |
| LQFP (NEY) | 32 | Ultra Librarian |