SN54SLC8T245-SEP
-
VID V62/22604
- Radiation tolerant:
- Single event latch-up (SEL) immune up to 43 MeV-cm 2 /mg at 125°C
- Total ionizing dose (TID) Radiation Lot Acceptance Testing (RLAT) for every wafer lot up to 20 krad(Si)
- Qualified, fully configurable dual-rail design allows each port to operate with a power supply range from 0.65 V to 3.6 V
- Operating temperature from –55°C to +125°C
- Multiple direction-control pins allows simultaneous up and down translation
- Up to 380 Mbps support when translating from 1.8 V to 3.3 V
- V CC isolation feature that effectively isolates both buses in a power-down scenario
- Partial power-down mode to limit backflow current in a power-down scenario
- Latch-up performance exceeds 100 mA per JESD 78, class II
- ESD protection exceeds JESD 22
- 8000-V human-body model
- 1000-V charged-device model
The SN54SLC8T245-SEP device is an 8-bit non-inverting bus transceiver that resolves voltage level mismatch between devices operating at the latest voltage nodes (0.7 V, 0.8 V, and 0.9 V) and devices operating at industry standard voltage nodes (1.8 V, 2.5 V, and 3.3 V).
The device operates by using two independent power-supply rails (V CCA and V CCB) that operate as low as 0.65 V. Data pins A1 through A8 are designed to track V CCA, which accepts any supply voltage from 0.65 V to 3.6 V. Data pins B1 through B8 are designed to track V CCB, which accepts any supply voltage from 0.65 V to 3.6 V.
The SN54SLC8T245-SEP device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (DIR1 and DIR2). The output-enable ( OE) input is used to disable the outputs so the buses are effectively isolated.
The SN54SLC8T245-SEP device is designed so the control pins (DIR and OE) are referenced to V CCA.
This device is fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.
The V CC isolation feature is designed so that if either V CC input supply is below 100 mV, all level shifter outputs are disabled and placed into a high-impedance state.
To put the level shifter I/Os in the high-impedance state during power up or power down, tie OE to V CCA through a pullup resistor; the current-sinking capability of the driver determines the minimum value of the resistor.
기술 자료
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | SN54SLC8T245-SEP8-Bit Dual-Supply Bus Transceiver With Configurable Voltage Translation and Tri-State Outputs datasheet (Rev. B) | PDF | HTML | 2023/12/05 |
* | Radiation & reliability report | SN54SLC8T245-SEP Production Flow and Reliability Report | PDF | HTML | 2022/10/20 |
* | Radiation & reliability report | SN54SLC8T245-SEP Single Event Effects Report | PDF | HTML | 2022/10/12 |
* | Radiation & reliability report | SN54SLC8T245-SEP Total Ionizing Dose (TID) | PDF | HTML | 2022/10/03 |
Application note | Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators | PDF | HTML | 2024/10/02 | |
Application brief | TI Space Enhanced Plastic Logic Overview and Applications in Low-Earth Orbit Satellite Platforms | PDF | HTML | 2024/09/10 | |
Application note | Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators | PDF | HTML | 2024/07/12 | |
Application note | Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) | PDF | HTML | 2024/07/03 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
AVCLVCDIRCNTRL-EVM — AVC 및 LVC를 지원하는 방향 제어 양방향 변환 디바이스를 위한 일반 EVM
The generic EVM is designed to support one, two, four and eight channel LVC and AVC direction-controlled translation devices. It also supports the bus hold and automotive -Q1 devices in the same number of channels. The AVC are low voltage translation devices with lower drive strength of 12mA. LVC (...)
ALPHA-3P-ADM-VA601-SPACE-AMD — AMD Versal 코어 XQRVC1902 ACAP 및 TI 방사선 내성 제품을 사용하는 Alpha Data ADM-VA601 키트
AMD-Xilinx®® Versal AI Core XQRVC1902 적응형 SoC/FPGA를 강조하는 6U VPX 폼 팩터입니다. ADM-VA600은 FMC+ 커넥터 1개, DDR4 DRAM 및 시스템 모니터링 기능을 갖춘 모듈식 보드 설계입니다. 대부분의 구성 요소는 방사능 내성 전원 관리, 인터페이스, 클로킹 및 임베디드 프로세싱(-SEP) 장치입니다.
패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
---|---|---|
TSSOP (PW) | 24 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치