SN74AVC16T245
- Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage
- VCC Isolation Feature – If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State
- Overvoltage-Tolerant Inputs and Outputs Allow Mixed-Voltage-Mode Data Communications
- Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.2V to 3.6V Power-Supply Range
- Ioff Supports Partial-Power-Down Mode Operation
- I/Os Are 4.6V Tolerant
- Maximum Data Rates
- 380Mbps (1.8V to 3.3V Level-Shifting)
- 200Mbps (<1.8V to 3.3V Level-Shifting)
- 200Mbps (Level-Shifting to 2.5V or 1.8V)
- 150Mbps (Level-Shifting to 1.5V)
- 100Mbps (Level-Shifting to 1.2V)
- Latch-Up Performance Exceeds 100mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 8000V Human-Body Model (A114-A)
- 200V Machine Model (A115-A)
- 1000V Charged-Device Model (C101)
This 16-bit noninverting bus transceiver uses two separate configurable power-supply rails. The SN74AVC16T245 device is optimized to operate with VCCA/VCCB set at 1.4V to 3.6V. The device is operational with VCCA/VCCB as low as 1.2V. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2V to 3.6V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.2V to 3.6V. This allows for universal low-voltage bidirectional translation between any of the 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V voltage nodes.
The SN74AVC16T245 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable ( OE) input can be used to disable the outputs so the buses effectively are isolated.
The SN74AVC16T245 control pins (1DIR, 2DIR, 1 OE, and 2 OE) are supplied by VCCA.
관심 가지실만한 유사 제품
비교 대상 장치와 유사한 기능.
기술 자료
| 상위 문서 | 유형 | 직함 | 형식 옵션 | 최신 영어 버전 다운로드 | 날짜 |
|---|---|---|---|---|---|
| * | 데이터 시트 | SN74AVC16T245 16-Bit Dual-Supply Bus Transceiver with Configurable Level-Shifting / Voltage Translation and Tri-State Outputs datasheet (Rev. F) | PDF | HTML | 2024. 3. 1 | |
| 애플리케이션 노트 | Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators | PDF | HTML | 2024. 10. 2 | ||
| 애플리케이션 노트 | Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators | PDF | HTML | 2024. 7. 12 | ||
| 애플리케이션 노트 | Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) | PDF | HTML | 2024. 7. 3 | ||
| 선택 가이드 | Voltage Translation Buying Guide (Rev. A) | 2021. 4. 15 |
설계 및 개발
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| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| TSSOP (DGG) | 48 | Ultra Librarian |
| TVSOP (DGV) | 48 | Ultra Librarian |