SN74BCT574

활성

8진 D형 에지 트리거 플립플롭

제품 상세 정보

Number of channels 8 Technology family BCT Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type TTL-Compatible CMOS Output type 3-State Clock frequency (max) (MHz) 77 IOL (max) (mA) 64 IOH (max) (mA) -15 Supply current (max) (µA) 62000 Features Very high speed (tpd 5-10ns) Operating temperature range (°C) 0 to 70 Rating Catalog
Number of channels 8 Technology family BCT Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type TTL-Compatible CMOS Output type 3-State Clock frequency (max) (MHz) 77 IOL (max) (mA) 64 IOH (max) (mA) -15 Supply current (max) (µA) 62000 Features Very high speed (tpd 5-10ns) Operating temperature range (°C) 0 to 70 Rating Catalog
PDIP (N) 20 228.702 mm² 24.33 x 9.4 SOIC (DW) 20 131.84 mm² 12.8 x 10.3
  • Operating Voltage Range of 4.5 V to 5.5 V
  • State-of-the-Art BiCMOS Design Significantly Reduces ICCZ
  • Full Parallel Access for Loading
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

  • Operating Voltage Range of 4.5 V to 5.5 V
  • State-of-the-Art BiCMOS Design Significantly Reduces ICCZ
  • Full Parallel Access for Loading
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight flip-flops of the ’BCT574 devices are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels that were set up at the data (D) inputs.

A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

To ensure the high-impedance state during power up or power down, (OE)\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

(OE)\ does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight flip-flops of the ’BCT574 devices are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels that were set up at the data (D) inputs.

A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

To ensure the high-impedance state during power up or power down, (OE)\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

(OE)\ does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

다운로드

관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 동일한 기능을 지원하는 핀 대 핀
SN74ACT574 활성 3상 출력을 지원하는 8진 D형 에지 트리거 플립플롭 Voltage range 4.5V to 5.5V, average propagation delay 8ns, average drive strength 24mA
SN74AHCT574 활성 3상 출력을 지원하는 8진 에지 트리거 D형 플립플롭 Voltage range 4.5V to 5.5V, average propagation delay 9ns, average drive strength 8mA
SN74LVTH574 활성 3상 출력을 지원하는 3.3V ABT 8진 에지 트리거 D형 플립플롭 Voltage range 2.7V to 3.6V, average propagation delay 4.5ns, average drive strength 64mA
비교 대상 장치와 유사한 기능
CD74HCT574 활성 3상 출력을 지원하는 고속 CMOS 로직 8진 양극 에지 트리거 D형 플립플롭 Voltage range 4.5V to 5.5V, average propagation delay 22ns, average drive strength 4mA

기술 자료

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* Data sheet SN54BCT574, SN74BCT574 datasheet (Rev. C) 2003/03/11

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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