홈 로직 및 전압 변환 버퍼, 드라이버 및 트랜시버 비인버팅 버퍼 및 드라이버
홈
로직 및 전압 변환
버퍼, 드라이버 및 트랜시버
비인버팅 버퍼 및 드라이버

SN74HC244-EP

활성

3상 출력을 지원하는 향상된 제품 8채널, 2V~6V 버퍼

지금 주문
데이터 시트

SN74HC244-EP

활성
데이터 시트 지금 주문

제품 상세 정보

Technology family HC Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Number of channels 8 IOL (max) (mA) 7.8 Supply current (max) (µA) 80 IOH (max) (mA) -7.8 Input type Standard CMOS Output type 3-State Features Balanced outputs, Very high speed (tpd 5-10ns) Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125
Technology family HC Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Number of channels 8 IOL (max) (mA) 7.8 Supply current (max) (µA) 80 IOH (max) (mA) -7.8 Input type Standard CMOS Output type 3-State Features Balanced outputs, Very high speed (tpd 5-10ns) Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125
SOIC (DW) 20 131.84 mm² 12.8 x 10.3 TSSOP (PW) 20 41.6 mm² 6.5 x 6.4
  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Extended Temperature Performance of –55° to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product Change Notification
  • Qualification Pedigree
  • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
  • High-Current Outputs Drive up to 15 LSTTL Loads

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life.
  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Extended Temperature Performance of –55° to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product Change Notification
  • Qualification Pedigree
  • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
  • High-Current Outputs Drive up to 15 LSTTL Loads

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life.

These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC244 are organized as two 4-bit buffers/drivers with separate output-enable (OE)\ inputs. When OE\ is low, the device passes noninverted data from the A inputs to the Y outputs. When OE\ is high, the outputs are in the high-impedance state.

These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC244 are organized as two 4-bit buffers/drivers with separate output-enable (OE)\ inputs. When OE\ is low, the device passes noninverted data from the A inputs to the Y outputs. When OE\ is high, the outputs are in the high-impedance state.
filter 기타 비인버팅 버퍼 및 드라이버 찾기
다운로드 스크립트와 함께 비디오 보기 동영상

관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 동일한 기능을 지원하는 핀 대 핀
SN74LV244B-EP 활성 향상된 제품, 3상 출력을 지원하는 8채널, 2V~5.5V 버퍼 Voltage range (1.65V to 5.5V), voltage translation capable

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.
16개 모두 보기
유형 직함 날짜
* Data sheet Octal Buffers and Line Drivers With 3-State Outputs datasheet (Rev. A) 2004/01/06
* VID SN74HC244-EP VID V6203607 2016/06/21
* Radiation & reliability report SN74HC244QDWREP Reliability Report 2012/03/15
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 2021/07/26
Selection guide Logic Guide (Rev. AB) 2017/06/12
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015/12/02
User guide LOGIC Pocket Data Book (Rev. B) 2007/01/16
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004/07/08
User guide Signal Switch Data Book (Rev. A) 2003/11/14
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002/08/29
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 1997/06/01
Application note Designing With Logic (Rev. C) 1997/06/01
Application note Input and Output Characteristics of Digital Integrated Circuits 1996/10/01
Application note Live Insertion 1996/10/01
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 1996/05/01
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 1996/04/01

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

패키지 핀 CAD 기호, 풋프린트 및 3D 모델
SOIC (DW) 20 Ultra Librarian
TSSOP (PW) 20 Ultra Librarian
TI의 평가 항목에 대한 표준 약관이 적용됩니다.

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

포럼 주제 모두 보기(영문)

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