인터페이스 UART

TL16C750E

활성

128바이트 FIFO 및 자동 흐름 제어를 지원하는 단일 UART

제품 상세 정보

Number of channels 1 FIFO (Byte) 128 Rx FIFO trigger levels (#) 4 Tx FIFO trigger levels (#) 4 Programmable FIFO trigger levels Yes CPU interface X86, X86 or 68K Baud rate at Vcc = 2.5 V & with 16x sampling (max) (MBps) 1.5 Baud rate at Vcc = 1.8 V & with 16x sampling (max) (MBps) 1 Baud rate at Vcc = 3.3 V & with 16x sampling (max) (MBps) 3 Baud rate at Vcc = 5 V & with 16x sampling (max) (MBps) 6 Operating voltage (V) 1.8, 2.5, 3.3, 5 Auto RTS/CTS Yes Rating Catalog Operating temperature range (°C) -40 to 105
Number of channels 1 FIFO (Byte) 128 Rx FIFO trigger levels (#) 4 Tx FIFO trigger levels (#) 4 Programmable FIFO trigger levels Yes CPU interface X86, X86 or 68K Baud rate at Vcc = 2.5 V & with 16x sampling (max) (MBps) 1.5 Baud rate at Vcc = 1.8 V & with 16x sampling (max) (MBps) 1 Baud rate at Vcc = 3.3 V & with 16x sampling (max) (MBps) 3 Baud rate at Vcc = 5 V & with 16x sampling (max) (MBps) 6 Operating voltage (V) 1.8, 2.5, 3.3, 5 Auto RTS/CTS Yes Rating Catalog Operating temperature range (°C) -40 to 105
TQFP (PFB) 48 81 mm² 9 x 9
  • Supports wide supply voltage range of 1.62 V to 5.5 V
    • 6 Mbps (48-MHz oscillator input clock)
      at 5 V and 3.3 V
    • 3 Mbps (48-MHz oscillator input clock)
      at 5 V and 3.3 V
    • 2 Mbps (32-MHz oscillator input clock)
      at 3.3 V
    • 1.5 Mbps (24-MHz oscillator input clock)
      at 2.5 V
    • 1 Mbps (16-MHz oscillator Input clock)
      at 1.8 V
  • Characterized for operation from –40°C to 105°C
  • 128-byte transmit or receive FIFO
  • 6-bit fractional baud rate divider
  • Software-selectable baud-rate generator
  • Programmable and selectable transmit and Receive FIFO Trigger Levels for DMA, interrupt generation, and software or hardware flow control
  • Software/Hardware flow control
    • Programmable Xon and Xoff characters with optional Xon any character
    • Programmable Auto-RTS and Auto-CTS-modem control functions (CTS, RTS, DSR, DTR, RI, and CD)
  • DMA signaling capability for both received and transmitted data
  • RS-485 mode support
  • Infrared data association (IrDA) capability
  • Programmable sleep mode
  • Programmable serial interface characteristics
    • 5, 6, 7, or 8-bit characters with 1, 1.5, or 2 stop bit generation
    • Even, odd, or no parity bit generation and detection
  • False start bit and line break detection
  • Internal test and loopback capabilities
  • Supports wide supply voltage range of 1.62 V to 5.5 V
    • 6 Mbps (48-MHz oscillator input clock)
      at 5 V and 3.3 V
    • 3 Mbps (48-MHz oscillator input clock)
      at 5 V and 3.3 V
    • 2 Mbps (32-MHz oscillator input clock)
      at 3.3 V
    • 1.5 Mbps (24-MHz oscillator input clock)
      at 2.5 V
    • 1 Mbps (16-MHz oscillator Input clock)
      at 1.8 V
  • Characterized for operation from –40°C to 105°C
  • 128-byte transmit or receive FIFO
  • 6-bit fractional baud rate divider
  • Software-selectable baud-rate generator
  • Programmable and selectable transmit and Receive FIFO Trigger Levels for DMA, interrupt generation, and software or hardware flow control
  • Software/Hardware flow control
    • Programmable Xon and Xoff characters with optional Xon any character
    • Programmable Auto-RTS and Auto-CTS-modem control functions (CTS, RTS, DSR, DTR, RI, and CD)
  • DMA signaling capability for both received and transmitted data
  • RS-485 mode support
  • Infrared data association (IrDA) capability
  • Programmable sleep mode
  • Programmable serial interface characteristics
    • 5, 6, 7, or 8-bit characters with 1, 1.5, or 2 stop bit generation
    • Even, odd, or no parity bit generation and detection
  • False start bit and line break detection
  • Internal test and loopback capabilities

The TL16C750E is a single universal asynchronous receiver transmitter (UART) with 128-byte FIFOs, fractional baud rate support, automatic hardware, software flow control and data rates up to 6 Mbps. The device offers enhanced features such as fractional baud rate and a transmission character control register (TCR) that stores received FIFO threshold level to start or stop transmission during hardware and software flow control automatically without intervention from the CPU.

With the FIFO RDY register, the software gets the status of TXRDY or RXRDY, saving extra GPIO usage. On-chip status registers provide the user with error indications, operational status, and modem interface control. System interrupts may be tailored to meet user requirements. An internal loop-back capability allows onboard diagnostics. The TL16C750E incorporates the functionality of UART, the UART having its own register set and FIFO.

This version includes the Alternate Function Register (AFR) and this is used to enable some extra functionality beyond the capabilities of the TL16C750 version. One addition is the IrDA mode, which supports Standard IrDA (SIR) mode with baud rates from 2400 to 115.2 kbps. The third addition is support for RS-485 bus drivers or transceivers by providing an output pin (DTRx) per channel, which is timed to keep the RS-485 driver enabled as long as transmit data is pending.

Another name for the UART function is asynchronous communications element (ACE), and these terms are used interchangeably. The bulk of this document describes the behavior of each ACE, with the understanding that two such devices are incorporated into the TL16C750E device.

The TL16C750E is a single universal asynchronous receiver transmitter (UART) with 128-byte FIFOs, fractional baud rate support, automatic hardware, software flow control and data rates up to 6 Mbps. The device offers enhanced features such as fractional baud rate and a transmission character control register (TCR) that stores received FIFO threshold level to start or stop transmission during hardware and software flow control automatically without intervention from the CPU.

With the FIFO RDY register, the software gets the status of TXRDY or RXRDY, saving extra GPIO usage. On-chip status registers provide the user with error indications, operational status, and modem interface control. System interrupts may be tailored to meet user requirements. An internal loop-back capability allows onboard diagnostics. The TL16C750E incorporates the functionality of UART, the UART having its own register set and FIFO.

This version includes the Alternate Function Register (AFR) and this is used to enable some extra functionality beyond the capabilities of the TL16C750 version. One addition is the IrDA mode, which supports Standard IrDA (SIR) mode with baud rates from 2400 to 115.2 kbps. The third addition is support for RS-485 bus drivers or transceivers by providing an output pin (DTRx) per channel, which is timed to keep the RS-485 driver enabled as long as transmit data is pending.

Another name for the UART function is asynchronous communications element (ACE), and these terms are used interchangeably. The bulk of this document describes the behavior of each ACE, with the understanding that two such devices are incorporated into the TL16C750E device.

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기술 문서

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모두 보기1
유형 직함 날짜
* Data sheet TL16C750E UART with 128-Byte FIFO datasheet PDF | HTML 2017/05/19

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

TL16C750EEVM — TL16C750E 128바이트 FIFO 분수 보 레이트 UART 평가 모듈

This EVM provides the user with the ability to evaluate the TL16C750E device and its features. The EVM includes an onboard 3.3-V LDO as well as level translation for processors which operate at a higher voltage rail.
사용 설명서: PDF
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시뮬레이션 툴

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패키지 다운로드
TQFP (PFB) 48 옵션 보기

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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