CDCLVD1204
- 2:4 differential buffer
- Low additive jitter: <300fs RMS in 10kHz to 20MHz
- Low output skew of 20ps (maximum)
- Universal inputs accept LVDS, LVPECL, and LVCMOS
- Selectable clock inputs through control pin
- 4 LVDS outputs, ANSI EIA/TIA-644A standard compatible
- Clock frequency: up to 800MHz
- Device power supply: 2.375V to 2.625V
- LVDS reference voltage, VAC_REF, available for capacitive coupled inputs
- Industrial temperature range: –40°C to 85°C
- Packaged in 3mm × 3mm, 16-Pin VQFN (RGT)
- ESD protection exceeds 3kV HBM, 1kV CDM
The CDCLVD1204 clock buffer distributes one of two selectable clock inputs (IN0 and IN1) to 4 pairs of differential LVDS clock outputs (OUT0 through OUT3) with minimum skew for clock distribution. The CDCLVD1204 can accept two clock sources into an input multiplexer. The inputs can either be LVDS, LVPECL, or LVCMOS.
The CDCLVD1204 is specifically designed for driving 50Ω transmission lines. In case of driving the inputs in single ended mode, the appropriate bias voltage, VAC_REF, must be applied to the unused negative input pin.
The IN_SEL pin selects the input which is routed to the outputs. If this pin is left open, it disables the outputs (static). The part supports a fail safe function. The device incorporates an input hysteresis which prevents random oscillation of the outputs in the absence of an input signal.
The device operates in 2.5V supply environment and is characterized from –40°C to 85°C (ambient temperature). The CDCLVD1204 is packaged in small, 16-pin, 3mm × 3mm VQFN package.
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技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | CDCLVD1204 2:4 Low Additive Jitter LVDS Buffer datasheet (Rev. C) | PDF | HTML | 2026/5/14 | ||
| 應用說明 | Sine to Square Wave Conversion Using Clock Buffers | PDF | HTML | 2024/9/3 | |||
| 應用說明 | Clocking Design Guidelines: Unused Pins | 2015/11/19 | ||||
| 使用指南 | Low-Additive Jitter, Four LVDS Outputs Clock Buffer Evaluation Board | 2010/6/14 |
設計與開發
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CDCLVD1204EVM — CDCLVD1204 評估模組
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN (RGT) | 16 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。