產品詳細資料

Rating High Temp Integrated isolated power No Isolation rating Basic Number of channels 2 Forward/reverse channels 1 forward / 1 reverse Default output High Data rate (max) (Mbps) 25 Surge isolation voltage (VIOSM) (VPK) 4000 Transient isolation voltage (VIOTM) (VPK) 4000 Withstand isolation voltage (VISO) (Vrms) 2500 CMTI (min) (V/µs) 15000 Operating temperature range (°C) -55 to 175 Supply voltage (max) (V) 5.5 Supply voltage (min) (V) 2.8 Propagation delay time (typ) (µs) 0.036 Creepage (min) (mm) 4 Clearance (min) (mm) 4
Rating High Temp Integrated isolated power No Isolation rating Basic Number of channels 2 Forward/reverse channels 1 forward / 1 reverse Default output High Data rate (max) (Mbps) 25 Surge isolation voltage (VIOSM) (VPK) 4000 Transient isolation voltage (VIOTM) (VPK) 4000 Withstand isolation voltage (VISO) (Vrms) 2500 CMTI (min) (V/µs) 15000 Operating temperature range (°C) -55 to 175 Supply voltage (max) (V) 5.5 Supply voltage (min) (V) 2.8 Propagation delay time (typ) (µs) 0.036 Creepage (min) (mm) 4 Clearance (min) (mm) 4
SOIC (D) 8 29.4 mm² 4.9 x 6
  • 1-, 5- and 25-Mbps Signaling Rate Options
    • Low Channel-to-Channel Output Skew; 1 ns max
    • Low Pulse-Width Distortion (PWD); 1 ns max
    • Low Jitter Content; 1 ns Typ at 150 Mbps
  • 4000-Vpeak Isolation, 560 Vpeak VIORM
    • UL 1577 Approved
    • 50-kV/µs Typical Transient Immunity
  • Operates with 3.3-V or 5-V Supplies
  • 4-kV ESD Protection
  • High Electromagnetic Immunity
  • 1-, 5- and 25-Mbps Signaling Rate Options
    • Low Channel-to-Channel Output Skew; 1 ns max
    • Low Pulse-Width Distortion (PWD); 1 ns max
    • Low Jitter Content; 1 ns Typ at 150 Mbps
  • 4000-Vpeak Isolation, 560 Vpeak VIORM
    • UL 1577 Approved
    • 50-kV/µs Typical Transient Immunity
  • Operates with 3.3-V or 5-V Supplies
  • 4-kV ESD Protection
  • High Electromagnetic Immunity

The ISO7221 is a dual-channel digital isolator. To facilitate PCB layout, the channels are oriented in the opposite directions. This device has a logic input and output buffer separated by TI’s silicon-dioxide (SiO2) isolation barrier, providing galvanic isolation of up to 4000 V. Used in conjunction with isolated power supplies, this device blocks high voltage, isolates grounds, and prevents noise currents on a data bus or other circuits from entering the local ground and interfering with or damaging sensitive circuitry.

A binary input signal is conditioned, translated to a balanced signal, then differentiated by the capacitive isolation barrier. Across the isolation barrier, a differential comparator receives the logic transition information, then sets or resets a flip-flop and the output circuit accordingly. A periodic update pulse is sent across the barrier to ensure the proper dc level of the output. If this dc-refresh pulse is not received every 4 µs, the input is assumed to be unpowered or not being actively driven, and the failsafe circuit drives the output to a logic high state.

The small capacitance and resulting time constant provide fast operation with signaling rates available from 0 Mbps (dc) to 150 Mbps(3). The A-, B- and C-option devices have TTL input thresholds and a noise filter at the input that prevents transient pulses from being passed to the output of the device. The M-option devices have CMOS VCC/2 input thresholds and do not have the input noise-filter and the additional propagation delay.

This device requires two supply voltages of 3.3 V, 5 V, or any combination. All inputs are 5-V tolerant when supplied from a 3.3-V supply and all outputs are 4-mA CMOS.

The ISO7221 is characterized for operation over the ambient temperature range of –55°C to 175°C.

The ISO7221 is a dual-channel digital isolator. To facilitate PCB layout, the channels are oriented in the opposite directions. This device has a logic input and output buffer separated by TI’s silicon-dioxide (SiO2) isolation barrier, providing galvanic isolation of up to 4000 V. Used in conjunction with isolated power supplies, this device blocks high voltage, isolates grounds, and prevents noise currents on a data bus or other circuits from entering the local ground and interfering with or damaging sensitive circuitry.

A binary input signal is conditioned, translated to a balanced signal, then differentiated by the capacitive isolation barrier. Across the isolation barrier, a differential comparator receives the logic transition information, then sets or resets a flip-flop and the output circuit accordingly. A periodic update pulse is sent across the barrier to ensure the proper dc level of the output. If this dc-refresh pulse is not received every 4 µs, the input is assumed to be unpowered or not being actively driven, and the failsafe circuit drives the output to a logic high state.

The small capacitance and resulting time constant provide fast operation with signaling rates available from 0 Mbps (dc) to 150 Mbps(3). The A-, B- and C-option devices have TTL input thresholds and a noise filter at the input that prevents transient pulses from being passed to the output of the device. The M-option devices have CMOS VCC/2 input thresholds and do not have the input noise-filter and the additional propagation delay.

This device requires two supply voltages of 3.3 V, 5 V, or any combination. All inputs are 5-V tolerant when supplied from a 3.3-V supply and all outputs are 4-mA CMOS.

The ISO7221 is characterized for operation over the ambient temperature range of –55°C to 175°C.

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類型 標題 日期
* Data sheet Dual Digital Isolator . datasheet (Rev. A) 2012年 10月 1日
* Radiation & reliability report ISO7221HD Reliability Report (Rev. A) 2012年 8月 17日
White paper Improve Your System Performance by Replacing Optocouplers with Digital Isolators (Rev. C) PDF | HTML 2023年 9月 7日
Certificate UL Certificate of Compliance File E181974 Vol 4 Sec 1 (Rev. A) 2022年 8月 5日
White paper Why are Digital Isolators Certified to Meet Electrical Equipment Standards? 2021年 11月 16日
White paper Distance Through Insulation: How Digital Isolators Meet Certification Requiremen PDF | HTML 2021年 6月 11日
EVM User's guide Universal Digital Isolator Evaluation Module PDF | HTML 2021年 3月 4日
Application brief Considerations for Selecting Digital Isolators 2018年 7月 24日

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ISO7221 IBIS Model

SLLM208.ZIP (13 KB) - IBIS Model
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SOIC (D) 8 Ultra Librarian

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