ISO7821
- Signaling Rate: Up to 100Mbps
- Wide Supply Range: 2.25V to 5.5V
- 2.25V to 5.5V Level Translation
- Wide Temperature Range: –55°C to 125°C
- Low Power Consumption, Typical 1.8mA per Channel at 1Mbps
- Low Propagation Delay: 11ns Typical (5V Supplies)
- Industry leading CMTI(Min): ±100kV/µs
- Robust Electromagnetic Compatibility (EMC)
- System-Level ESD, EFT, and Surge Immunity
- Low Emissions
- Isolation Barrier Life: > 25 Years
- SOIC-16 Wide Body (DW) and Extra-Wide Body (DWW) Package Options
- Safety and Regulatory Approvals:
- 8000VPK Reinforced Isolation per DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
- 5.7kVRMS Isolation for 1 minute per UL 1577
- CSA Component Acceptance Notice 5A, IEC 60950-1 and IEC 60601-1 End Equipment Standards
- CQC Certification per GB4943.1-2011
- TUV Certification per EN 61010-1 and EN 60950-1
- All DW Package Certifications Complete; DWW Package Certifications Complete per UL, TUV and Planned for VDE, CSA, and CQC
The ISO7821 is a high-performance, dual-channel digital isolator with 8000VPK isolation voltage. This device has reinforced isolation certifications according to VDE, CSA, CQC, and TUV. The isolator provides high electromagnetic immunity and low emissions at low power consumption, while isolating CMOS or LVCMOS digital I/Os. Each isolation channel has a logic input and output buffer separated by silicon dioxide (SiO2) insulation barrier. ISO7821 has one forward and one reverse-direction channel. If the input power or signal is lost, default output is high for the ISO7821 and low for the ISO7821F device. Used in conjunction with isolated power supplies, this device prevents noise currents on a data bus or other circuits from entering the local ground and interfering with or damaging sensitive circuitry. Through innovative chip design and layout techniques, electromagnetic compatibility of ISO7821 has been significantly enhanced to ease system-level ESD, EFT, Surge and Emissions compliance. ISO7821 is available in 16-pin SOIC wide-body (DW) and extra-wide body (DWW) packages. The DWW package option comes with enable pins which can be used to put the respective outputs in high impedance for multi-controller driving applications and to reduce power consumption.
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封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
SOIC (DW) | 16 | Ultra Librarian |
SOIC (DWW) | 16 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。