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線性與低壓差 (LDO) 穩壓器

LP38500-ADJ

現行

1.5-A 可調節超低壓降電壓穩壓器

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產品規格表

LP38500-ADJ

現行
產品規格表 立即訂購

產品詳細資料

Output options Adjustable Output Iout (max) (A) 1.5 Vin (max) (V) 5.5 Vin (min) (V) 2.7 Vout (max) (V) 5.1 Vout (min) (V) 0.6 Noise (µVrms) 100 Iq (typ) (mA) 2 Thermal resistance θJA (°C/W) 33 Rating Catalog Load capacitance (min) (µF) 10 Regulated outputs (#) 1 Accuracy (%) 2 PSRR at 100 KHz (dB) 25 Dropout voltage (Vdo) (typ) (mV) 220 Operating temperature range (°C) -40 to 125
Output options Adjustable Output Iout (max) (A) 1.5 Vin (max) (V) 5.5 Vin (min) (V) 2.7 Vout (max) (V) 5.1 Vout (min) (V) 0.6 Noise (µVrms) 100 Iq (typ) (mA) 2 Thermal resistance θJA (°C/W) 33 Rating Catalog Load capacitance (min) (µF) 10 Regulated outputs (#) 1 Accuracy (%) 2 PSRR at 100 KHz (dB) 25 Dropout voltage (Vdo) (typ) (mV) 220 Operating temperature range (°C) -40 to 125
TO-263 (KTT) 5 154.8384 mm² 10.16 x 15.24 TO-263 (NDQ) 5 142.3416 mm² 10.16 x 14.01 WSON (NGS) 8 7.5 mm² 3 x 2.5
  • Input Voltage: 2.7 V to 5.5 V
  • Adjustable Output Voltage: 0.6 V to 5 V
  • FlexCap: Stable with Ceramic, Tantalum, or
    Aluminum Capacitors
  • Stable with 10-µF Input and Output Capacitors
  • Low Ground-Pin Current
  • 25-nA Quiescent Current in Shutdown Mode
  • Ensured Output Current of 1.5 A
  • Ensured VADJ Accuracy of ±1.5% at 25°C (A
    Grade)
  • Ensured Accuracy of ±3.5% at 25°C (STD)
  • Overtemperature and Overcurrent Protection
  • ENABLE Pin (LP38502)
  • Input Voltage: 2.7 V to 5.5 V
  • Adjustable Output Voltage: 0.6 V to 5 V
  • FlexCap: Stable with Ceramic, Tantalum, or
    Aluminum Capacitors
  • Stable with 10-µF Input and Output Capacitors
  • Low Ground-Pin Current
  • 25-nA Quiescent Current in Shutdown Mode
  • Ensured Output Current of 1.5 A
  • Ensured VADJ Accuracy of ±1.5% at 25°C (A
    Grade)
  • Ensured Accuracy of ±3.5% at 25°C (STD)
  • Overtemperature and Overcurrent Protection
  • ENABLE Pin (LP38502)

TI’s FlexCap low-dropout (LDO) linear regulators feature unique compensation that allow use of any type of output capacitor with no limits on minimum or maximum equivalent series resistance (ESR). The LP38500 and LP38502 series of LDOs operates from a 2.7-V to 5.5-V input supply. These ultra-low-dropout linear regulators respond very quickly to step changes in load, making them suitable for low-voltage microprocessor applications. Developed on a CMOS process (utilizing a PMOS pass transistor) the LP38500-ADJ and LP38502-ADJ have low quiescent currents that changes little with load current.

  • GND Pin Current: Typically 2 mA at 1.5-A load current.
  • Disable Mode: Typically 25-nA quiescent current when the EN pin is pulled low. (LP38502-ADJ)
  • Simplified Compensation: Stable with any type of output capacitor, regardless of ESR.
  • Precision Output: grade versions available with 1.5% VADJ tolerance (25°C) and 3% over line, load, and temperature.

TI’s FlexCap low-dropout (LDO) linear regulators feature unique compensation that allow use of any type of output capacitor with no limits on minimum or maximum equivalent series resistance (ESR). The LP38500 and LP38502 series of LDOs operates from a 2.7-V to 5.5-V input supply. These ultra-low-dropout linear regulators respond very quickly to step changes in load, making them suitable for low-voltage microprocessor applications. Developed on a CMOS process (utilizing a PMOS pass transistor) the LP38500-ADJ and LP38502-ADJ have low quiescent currents that changes little with load current.

  • GND Pin Current: Typically 2 mA at 1.5-A load current.
  • Disable Mode: Typically 25-nA quiescent current when the EN pin is pulled low. (LP38502-ADJ)
  • Simplified Compensation: Stable with any type of output capacitor, regardless of ESR.
  • Precision Output: grade versions available with 1.5% VADJ tolerance (25°C) and 3% over line, load, and temperature.
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類型 標題 日期
* Data sheet LP3850x-ADJ, LP3850xA-ADJ 1.5-A Flexcap Low-Dropout Linear Regulator for 2.7-V to 5.5-V Inputs datasheet (Rev. H) PDF | HTML 2015年 9月 22日

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參考設計

PMP10580 — 適用於 Terasic DE0-Nano (Cyclone IV) 的電源解決方案 - 參考設計

The PMP10580 reference design provides all the power supply rails necessary to power Altera’s Cyclone® IV FPGA.  DE0-Nano was developed by Terasic and this board is available for purchase through Terasic’s website.
Test report: PDF
電路圖: PDF
封裝 引腳 下載
TO-263 (KTT) 5 檢視選項
TO-263 (NDQ) 5 檢視選項
WSON (NGS) 8 檢視選項
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