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邏輯和電壓轉換
正反器、鎖存器和暫存器
D 型正反器

SN54ALS29821

現行

具有 3 態輸出的 10 位元匯流排介面正反器

立即訂購
產品規格表

SN54ALS29821

現行
產品規格表 立即訂購

產品詳細資料

Number of channels 10 Technology family ALS Supply voltage (min) (V) 4.75 Supply voltage (max) (V) 5.25 Input type Bipolar Output type 3-State Clock frequency (max) (MHz) 75 IOL (max) (mA) 48 IOH (max) (mA) -24 Supply current (max) (µA) 15000 Features High speed (tpd 10-50ns) Operating temperature range (°C) -55 to 125 Rating Military
Number of channels 10 Technology family ALS Supply voltage (min) (V) 4.75 Supply voltage (max) (V) 5.25 Input type Bipolar Output type 3-State Clock frequency (max) (MHz) 75 IOL (max) (mA) 48 IOH (max) (mA) -24 Supply current (max) (µA) 15000 Features High speed (tpd 10-50ns) Operating temperature range (°C) -55 to 125 Rating Military
CDIP (JT) 24 221.44 mm² 32 x 6.92
  • Functionally Equivalent to AMD's AM29821
  • Provide Extra Data Width Necessary for Wider Address/Data Paths or Buses With Parity
  • Outputs Have Undershoot-Protection Circuitry
  • Power-Up High-Impedance State
  • Buffered Control Inputs Reduce dc Loading Effects
  • Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (NT) and Ceramic (JT) 300-mil DIPs

 
  • Functionally Equivalent to AMD's AM29821
  • Provide Extra Data Width Necessary for Wider Address/Data Paths or Buses With Parity
  • Outputs Have Undershoot-Protection Circuitry
  • Power-Up High-Impedance State
  • Buffered Control Inputs Reduce dc Loading Effects
  • Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (NT) and Ceramic (JT) 300-mil DIPs

 

These 10-bit edge-triggered D-type flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. These devices are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers.

On the positive transition of the clock (CLK) input, the Q outputs are true to the data (D) input.

A buffered output-enable () input can place the ten outputs in either a normal logic state (high or low logic levels) or a high-impedance state. The outputs also are in the high-impedance state during power-up and power-down conditions. The outputs remain in the high-impedance state while the device is powered down. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

The SN54ALS29821 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS29821 is characterized for operation from 0°C to 70°C.

 

 

These 10-bit edge-triggered D-type flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. These devices are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers.

On the positive transition of the clock (CLK) input, the Q outputs are true to the data (D) input.

A buffered output-enable () input can place the ten outputs in either a normal logic state (high or low logic levels) or a high-impedance state. The outputs also are in the high-impedance state during power-up and power-down conditions. The outputs remain in the high-impedance state while the device is powered down. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

The SN54ALS29821 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS29821 is characterized for operation from 0°C to 70°C.

 

 
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類型 標題 日期
* Data sheet 10-Bit Bus Interface Flip-Flops With 3-State Outputs datasheet (Rev. B) 1995年 1月 1日
* SMD SN54ALS29821 SMD 5962-90616 2016年 6月 21日
Application note Power-Up Behavior of Clocked Devices (Rev. B) PDF | HTML 2022年 12月 15日
Selection guide Logic Guide (Rev. AB) 2017年 6月 12日
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
User guide LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002年 8月 29日
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 1997年 8月 1日
Application note Designing With Logic (Rev. C) 1997年 6月 1日
Application note Input and Output Characteristics of Digital Integrated Circuits 1996年 10月 1日
Application note Live Insertion 1996年 10月 1日
Application note Advanced Schottky (ALS and AS) Logic Families 1995年 8月 1日

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