THS4011

現行

290-MHz 低失真電壓回饋放大器

產品詳細資料

Architecture Voltage FB Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 9 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 33 GBW (typ) (MHz) 290 BW at Acl (MHz) 290 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 310 Vn at flatband (typ) (nV√Hz) 7.5 Vn at 1 kHz (typ) (nV√Hz) 10.3 Iq per channel (typ) (mA) 7.8 Vos (offset voltage at 25°C) (max) (mV) 6 Rail-to-rail No Rating Catalog Operating temperature range (°C) -40 to 85 CMRR (typ) (dB) 110 Input bias current (max) (pA) 6000000 Offset drift (typ) (µV/°C) 15 Iout (typ) (mA) 110 2nd harmonic (dBc) 80 3rd harmonic (dBc) 80 Frequency of harmonic distortion measurement (MHz) 1
Architecture Voltage FB Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 9 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 33 GBW (typ) (MHz) 290 BW at Acl (MHz) 290 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 310 Vn at flatband (typ) (nV√Hz) 7.5 Vn at 1 kHz (typ) (nV√Hz) 10.3 Iq per channel (typ) (mA) 7.8 Vos (offset voltage at 25°C) (max) (mV) 6 Rail-to-rail No Rating Catalog Operating temperature range (°C) -40 to 85 CMRR (typ) (dB) 110 Input bias current (max) (pA) 6000000 Offset drift (typ) (µV/°C) 15 Iout (typ) (mA) 110 2nd harmonic (dBc) 80 3rd harmonic (dBc) 80 Frequency of harmonic distortion measurement (MHz) 1
HVSSOP (DGN) 8 14.7 mm² 3 x 4.9 SOIC (D) 8 29.4 mm² 4.9 x 6
  • High Speed
    • 290-MHz Bandwidth (G = 1, –3 dB)
    • 310-V/ms Slew Rate
    • 37-ns Settling Time (0.1%)
  • Low Distortion
    • THD = –80 dBc (f = 1 MHz, RL = 150 )
  • 110-mA Output Current Drive (Typical)
  • 7.5-nV/√Hz Voltage Noise
  • Excellent Video Performance
    • 70-MHz Bandwidth (0.1 dB, G = 1)
    • 0.006% Differential Gain Error
    • ±5-V to ±15-V Supply Voltage
  • Available in Standard SOIC, MSOP PowerPAD, JG, or FK Packages
  • Evaluation Module Available

  • High Speed
    • 290-MHz Bandwidth (G = 1, –3 dB)
    • 310-V/ms Slew Rate
    • 37-ns Settling Time (0.1%)
  • Low Distortion
    • THD = –80 dBc (f = 1 MHz, RL = 150 )
  • 110-mA Output Current Drive (Typical)
  • 7.5-nV/√Hz Voltage Noise
  • Excellent Video Performance
    • 70-MHz Bandwidth (0.1 dB, G = 1)
    • 0.006% Differential Gain Error
    • ±5-V to ±15-V Supply Voltage
  • Available in Standard SOIC, MSOP PowerPAD, JG, or FK Packages
  • Evaluation Module Available

The THS4011 and THS4012 are high-speed, single/dual, voltage feedback amplifiers ideal for a wide range of applications. The devices offer good ac performance, with 290-MHz bandwidth, 310-V/µs slew rate, and 37-ns settling time (0.1%). These amplifiers have a high output drive capability of 110 mA and draw only 7.8-mA supply current per channel. For applications requiring low distortion, the THS4011/4012 operate with a total harmonic distortion (THD) of -80 dBc at f = 1 MHz. For video applications, the THS4011/4012 offer 0.1-dB gain flatness to 70 MHz, 0.006% differential gain error, and 0.01° differential phase error.

The THS4011 and THS4012 are high-speed, single/dual, voltage feedback amplifiers ideal for a wide range of applications. The devices offer good ac performance, with 290-MHz bandwidth, 310-V/µs slew rate, and 37-ns settling time (0.1%). These amplifiers have a high output drive capability of 110 mA and draw only 7.8-mA supply current per channel. For applications requiring low distortion, the THS4011/4012 operate with a total harmonic distortion (THD) of -80 dBc at f = 1 MHz. For video applications, the THS4011/4012 offer 0.1-dB gain flatness to 70 MHz, 0.006% differential gain error, and 0.01° differential phase error.

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技術文件

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類型 標題 日期
* Data sheet 290-MHz Low-Distortion High-Speed Amplifiers datasheet (Rev. E) 2010年 4月 12日
Circuit design High-current voltage output circuit using a precision DAC (Rev. A) PDF | HTML 2024年 9月 19日
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017年 3月 28日
Analog Design Journal Using a decompensated op amp for improved performance 2005年 3月 11日
Application note Noise Analysis for High Speed Op Amps (Rev. A) 2005年 1月 17日
Application note Using a Decompensated Operational Amplifier for Improved Performance 2001年 3月 30日
Application note Nulling Input Offset Voltage of Operational Amplifiers 2000年 8月 2日
More literature THS4011M / 5962-9959301QxA 2000年 4月 26日
User guide THS4011 EVM User's Guide 1999年 6月 3日

設計與開發

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開發板

THS4011EVM — THS4011 高速放大器評估模組

The TI THS4011 high-speed operational amplifier evaluation module (EVM) is a complete, high-speed amplifier circuit. It consists of the TI THS4011 high-speed low-power operational amplifier IC, along with a small number of passive parts, mounted on a small circuit board measuring approximately 1.7 (...)

使用指南: PDF
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模擬型號

THS4011 PSpice Model (Rev. A)

SLOJ003A.ZIP (6 KB) - PSpice Model
模擬型號

TINA-TI Ref Design for High-Current Voltage O/P Circuit Using a Precision DAC

SBAM417.ZIP (23 KB) - TINA-TI Reference Design
計算工具

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VOLT-DIVIDER-CALC — Voltage divider calculation tool

The voltage divider calculation tool (VOLT-DIVIDER-CALC) quickly determines a set of resistors for a voltage divider. This KnowledgeBase JavaScript utility can be used to find a set of resistors for a voltage divider to achieve the desired output voltage. VOLT-DIVIDER-CALC can also be used to (...)
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PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前,建立完整的終端設備設計和解決方案原型,進而縮短上市時間並降低開發成本。 

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模擬工具

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使用指南: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
HVSSOP (DGN) 8 Ultra Librarian
SOIC (D) 8 Ultra Librarian

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  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
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  • 組裝地點

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