THS6226A

現行

閘控 H 類雙埠 VDSL2 與 PLC 線路驅動器

產品詳細資料

Number of channels 2 Architecture DSL Line Driver, PLC Line Driver Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 10 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 12.6 BW at Acl (MHz) 97 Acl, min spec gain (V/V) 19 Vn at flatband (typ) (nV√Hz) 6.5 Vn at 1 kHz (typ) (nV√Hz) 12 Iq per channel (typ) (mA) 24.6 Vos (offset voltage at 25°C) (max) (mV) 10 Rail-to-rail No Features Adjustable BW/IQ/IOUT, Shutdown Rating Catalog Operating temperature range (°C) -40 to 85 Offset drift (typ) (µV/°C) 15 GBW (typ) (MHz) 97 Iout (typ) (mA) 383 2nd harmonic (dBc) 87 3rd harmonic (dBc) 83 Frequency of harmonic distortion measurement (MHz) 1
Number of channels 2 Architecture DSL Line Driver, PLC Line Driver Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 10 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 12.6 BW at Acl (MHz) 97 Acl, min spec gain (V/V) 19 Vn at flatband (typ) (nV√Hz) 6.5 Vn at 1 kHz (typ) (nV√Hz) 12 Iq per channel (typ) (mA) 24.6 Vos (offset voltage at 25°C) (max) (mV) 10 Rail-to-rail No Features Adjustable BW/IQ/IOUT, Shutdown Rating Catalog Operating temperature range (°C) -40 to 85 Offset drift (typ) (µV/°C) 15 GBW (typ) (MHz) 97 Iout (typ) (mA) 383 2nd harmonic (dBc) 87 3rd harmonic (dBc) 83 Frequency of harmonic distortion measurement (MHz) 1
VQFN (RHB) 32 25 mm² 5 x 5
  • Digitally-Adjustable Quiescent Current:
    9.4 mA to 24.8 mA
  • Bias Current Step: 1.0 mA
  • Independent Voltage Boost and Main Line Driver Disable
  • Low-Power Line Termination Mode
  • Full Capacitor Recharge: 200 µs
  • Low Input Voltage Noise Density:
    6.5 nV/√Hz Input-Referred Voltage Noise
  • Low MTPR Distortion:
    70 dB with +19.8 dBm G.993.2—Profile 8b
  • –83-dBc HD3 (1 MHz, 60-Ω Differential)
  • High Output Current: 383 mA into 60 Ω
  • Wide Output Swing: 40 VPP (+12-V, 60-Ω Differential Load with a 1:1.4 Transformer)
  • Wide Bandwidth: 97 MHz
  • Port-to-Port Separation: 90 dB at 1 MHz
  • PSRR: 70 dB at 1 MHz for Good Isolation
  • Digitally-Adjustable Quiescent Current:
    9.4 mA to 24.8 mA
  • Bias Current Step: 1.0 mA
  • Independent Voltage Boost and Main Line Driver Disable
  • Low-Power Line Termination Mode
  • Full Capacitor Recharge: 200 µs
  • Low Input Voltage Noise Density:
    6.5 nV/√Hz Input-Referred Voltage Noise
  • Low MTPR Distortion:
    70 dB with +19.8 dBm G.993.2—Profile 8b
  • –83-dBc HD3 (1 MHz, 60-Ω Differential)
  • High Output Current: 383 mA into 60 Ω
  • Wide Output Swing: 40 VPP (+12-V, 60-Ω Differential Load with a 1:1.4 Transformer)
  • Wide Bandwidth: 97 MHz
  • Port-to-Port Separation: 90 dB at 1 MHz
  • PSRR: 70 dB at 1 MHz for Good Isolation

The THS6226A is a dual-port, class H, current-feedback architecture, differential line driver amplifier system ideal for xDSL systems. The device is targeted for use in very-high-bit-rate digital subscriber line 2 (VDSL2) line driver systems that enable native DTM signals while supporting greater than +20.5-dBm line power (up to 8.5 MHz) with good linearity, supporting the G.993.2 VDSL2 8b profile. The device is also fast enough to support central-office transmissions of +14.5-dBm line power up to 30 MHz.

The unique architecture of the device allows quiescent current to be minimal while still achieving very high linearity. Differential distortion, under full bias conditions, is –91 dBc at 1 MHz and reduces to only –75 dBc at 5 MHz. Fixed multiple bias settings of the amplifiers offer enhanced power savings for line lengths where the full performance of the amplifier is not required. To allow for even more flexibility and power savings on all profiles, quiescent current is digitally adjustable from 7.6 mA to 23 mA with a bias current step of 1.0 mA. For systems where additional power savings while not transmitting are desired, the device can be used in its line termination mode to maintain impedance matching.

The wide output swing on +12-V power supplies, coupled with excellent current drive, allows for wide dynamic headroom, keeping distortion minimal. The device is available in a VQFN-32 PowerPAD™ package.

The THS6226A is a dual-port, class H, current-feedback architecture, differential line driver amplifier system ideal for xDSL systems. The device is targeted for use in very-high-bit-rate digital subscriber line 2 (VDSL2) line driver systems that enable native DTM signals while supporting greater than +20.5-dBm line power (up to 8.5 MHz) with good linearity, supporting the G.993.2 VDSL2 8b profile. The device is also fast enough to support central-office transmissions of +14.5-dBm line power up to 30 MHz.

The unique architecture of the device allows quiescent current to be minimal while still achieving very high linearity. Differential distortion, under full bias conditions, is –91 dBc at 1 MHz and reduces to only –75 dBc at 5 MHz. Fixed multiple bias settings of the amplifiers offer enhanced power savings for line lengths where the full performance of the amplifier is not required. To allow for even more flexibility and power savings on all profiles, quiescent current is digitally adjustable from 7.6 mA to 23 mA with a bias current step of 1.0 mA. For systems where additional power savings while not transmitting are desired, the device can be used in its line termination mode to maintain impedance matching.

The wide output swing on +12-V power supplies, coupled with excellent current drive, allows for wide dynamic headroom, keeping distortion minimal. The device is available in a VQFN-32 PowerPAD™ package.

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類型 標題 日期
* Data sheet THS6226A Gated-Class H, Dual-Port VDSL2 Line Driver datasheet (Rev. A) PDF | HTML 2014年 5月 22日
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017年 3月 28日
Application note Noise Analysis for High Speed Op Amps (Rev. A) 2005年 1月 17日

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