TPD2E1B06

現行

雙 1-pF、±5.5-V、±10-kV ESD 防護二極體,具 USB 2.0 的 ESD 等級

產品詳細資料

Package name SOT-5X3 Peak pulse power (8/20 μs) (max) (W) 35 Vrwm (V) 5.5 Bi-/uni-directional Bi-directional Number of channels 2 IO capacitance (typ) (pF) 1 Clamping voltage (V) 11 Breakdown voltage (min) (V) 7
Package name SOT-5X3 Peak pulse power (8/20 μs) (max) (W) 35 Vrwm (V) 5.5 Bi-/uni-directional Bi-directional Number of channels 2 IO capacitance (typ) (pF) 1 Clamping voltage (V) 11 Breakdown voltage (min) (V) 7
SOT-5X3 (DRL) 6 2.56 mm² 1.6 x 1.6
  • Provides System Level ESD Protection for Low
    Voltage IO Interface
  • IEC 61000-4-2 Level 4 ESD Rating
  • Low IO Capacitance: 0.85 pF (Typical)
  • DC Breakdown Voltage: 7 V (Minimum)
  • Ultra-Low Leakage Current: 10 nA (Maximum)
  • Low ESD Clamping Voltage
  • Temperature Range: –40°C to 125°C
  • Small Easy-to-Route DRL package
  • Provides System Level ESD Protection for Low
    Voltage IO Interface
  • IEC 61000-4-2 Level 4 ESD Rating
  • Low IO Capacitance: 0.85 pF (Typical)
  • DC Breakdown Voltage: 7 V (Minimum)
  • Ultra-Low Leakage Current: 10 nA (Maximum)
  • Low ESD Clamping Voltage
  • Temperature Range: –40°C to 125°C
  • Small Easy-to-Route DRL package

The TPD2E1B06 device is a dual-channel, ultra-low capacitance ESD protection device. It offers ±10-KV IEC contact ESD protection. Its 1-pF line capacitance makes it suitable for a wide range of applications. Typical application interfaces are USB 2.0, LVDS, and I2C. The TPD2E1B06 device has two common layout methods, and both are highlighted in Layout.

The TPD2E1B06 device is a dual-channel, ultra-low capacitance ESD protection device. It offers ±10-KV IEC contact ESD protection. Its 1-pF line capacitance makes it suitable for a wide range of applications. Typical application interfaces are USB 2.0, LVDS, and I2C. The TPD2E1B06 device has two common layout methods, and both are highlighted in Layout.

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類型 標題 日期
* Data sheet TPD2E1B06 Dual-Channel High-Speed ESD Protection Device datasheet (Rev. D) PDF | HTML 2016年 4月 27日
Application note ESD and Surge Protection for USB Interfaces (Rev. B) PDF | HTML 2024年 1月 11日
User guide Reading and Understanding an ESD Protection Data Sheet (Rev. A) PDF | HTML 2023年 9月 19日
Application note Capacitance Requirements for High Speed Signals (Rev. A) PDF | HTML 2023年 8月 21日
Selection guide System-Level ESD Protection Guide (Rev. D) 2022年 9月 7日
Application note ESD Packaging and Layout Guide (Rev. B) PDF | HTML 2022年 8月 18日
Application note ESD Protection Layout Guide (Rev. A) PDF | HTML 2022年 4月 7日
User guide Generic ESD Evaluation Module User's Guide (Rev. A) PDF | HTML 2021年 9月 27日
White paper Designing USB for short-to-battery tolerance in automotive environments 2016年 2月 10日
EVM User's guide HVL054 User's Guide 2013年 8月 12日
Analog Design Journal Design Considerations for System-Level ESD Circuit Protection 2012年 9月 25日

設計與開發

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開發板

ESDEVM — 通用 ESD 評估模組

<p>The electrostatic-sensitive device (ESD) evaluation module (EVM) is a development platform for most of our ESD portfolio. The board comes with all traditional ESD footprints in order to test any number of devices. Devices can be soldered onto their respect footprint and then tested.</p>
(...)

使用指南: PDF | HTML
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模擬型號

TPD2E1B06 IBIS Model

SLVM933.ZIP (2 KB) - IBIS Model
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
參考設計

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PMP40001 is a full featured USB type-C PD DFP reference design. The pure analog configuration for the USB type-C source controller--TPS25740 makes the PD negotiation easy. It supports 3 sets of output voltage options including 5V/12V/20V.  The max output current is 3A which provides a maximal (...)
Test report: PDF
電路圖: PDF
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PMP40441 — 適用於 USB PD PPS 的多芯降壓-升壓電池充電器系統參考設計

This reference design is for USB Power Delivery (PD) battery charging applications, such as power banks or other portable devices. It employs the Buck-Boost charger BQ25713 for a wide input and output range for USB PD charging. The USB PD controller card (PMP40442) can configure the charger to run (...)
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電路圖: PDF
參考設計

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The PMP40294 reference design is designed for a high capacity battery packs which requires more and more charging and discharging power. It can support a wide input voltgae (5~20V) from any adaptor and deliver the maximal charging current up to 3A to a 3S battery pack. By adopting the (...)
Test report: PDF
電路圖: PDF
參考設計

PMP40280 — 雙向電池初始化系統控制電路板參考設計

The PMP40280 is a battery initialization reference design solution for automotive and battery applications. The MCU TM4C123GH6PZ sets charging/discharging current and real time monitors battery voltage and charging/discharging current. It will calibrate system gain error to meet (...)
Test report: PDF
電路圖: PDF
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SOT-5X3 (DRL) 6 檢視選項

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