適用所有尺寸 TV,包括閘脈衝調變的完全 I²C 可編程 6 通道 LCD 偏置 IC

TPS65177 不建議用於新設計
儘管為了支援以前的設計而繼續生產此項產品,但我們並不建議用在新設計上。考量下列其中一項替代產品:
open-in-new 比較替代產品
具備升級功能,可直接投入使用替代所比較的產品
TPS65177A 現行 適用所有尺寸 TV (包括閘極) 的全 I2C 可編程 6 通道 LCD 偏置 IC The product has the same functionality and parametrics.

產品詳細資料

Vin (min) (V) 8.6 Vin (max) (V) 14.7 Applications 13 to 21 inches, 21 inches and above Source driver voltage (min) (V) 13.5 Source driver voltage (max) (V) 19.8 Level shifter/scan driver (Ch) 0 V_POS (min) (V) 20 V_POS (max) (V) 40 V_NEG (min) (V) -14.5 V_NEG (max) (V) -5.5 Features GPM or GVS, HAVDD, I2C interface, Temperature sensor or compensation Topology Boost, Buck Rating Catalog Operating temperature range (°C) -40 to 85
Vin (min) (V) 8.6 Vin (max) (V) 14.7 Applications 13 to 21 inches, 21 inches and above Source driver voltage (min) (V) 13.5 Source driver voltage (max) (V) 19.8 Level shifter/scan driver (Ch) 0 V_POS (min) (V) 20 V_POS (max) (V) 40 V_NEG (min) (V) -14.5 V_NEG (max) (V) -5.5 Features GPM or GVS, HAVDD, I2C interface, Temperature sensor or compensation Topology Boost, Buck Rating Catalog Operating temperature range (°C) -40 to 85
VQFN (RHA) 40 36 mm² 6 x 6
  • Enable / Disable
    • TPS65177: VI power cycle
    • TPS65177A: VI power cycle or EN-pin
  • 8.6-V to 14.7-V Input Voltage Range
  • Non-Synchronous Boost Converter (V(AVDD))
    • Integrated Isolation Switch
    • 13.5-V to 19.8-V Output Voltage (I2C)
    • 15-V Default Output Voltage
    • 4.25-A Switch Current Limit (I2C)
    • High Voltage Stress Mode (I2C)
  • Synchronous Buck Converter (V(HAVDD))
    • 4.8-V to 11.1-V Output Voltage (I2C)
    • 7.5-V Default Output Voltage
    • 1.7-A Switch Current Limit
    • High Voltage Stress Mode (I2C)
  • Non-Synchronous Buck Converter (V(IO))
    • 2.2-V to 3.7-V Output Voltage (I2C)
    • 2.5-V Default Output Voltage
    • 3-A Switch Current Limit
  • Synchronous Buck Converter (V(CORE))
    • 0.8-V to 3.3-V Output Voltage (I2C)
    • 1-V Default Output Voltage
    • 2.5-A Switch Current Limit
  • Positive Charge-Pump Controller (V(GH))
    • 20-V to 40-V Output Voltage (I2C)
    • 28-V Default Output Voltage
    • Temp. Compensation Offset 0-V to 15-V (I2C)
    • 4-V Default Offset (28 V to 32 V)
  • Negative Charge-Pump Controller (V(GL))
    • –14.5-V to –5.5-V Output Voltage (I2C)
    • –7.9-V Default Output Voltage
  • Gate Pulse Modulation (GPM)
    • Down to 0-V, 5-V, 10-V or 15-V (I2C)
    • 0-V Default Discharge Voltage
  • Temperature Compensation for V(GH)
  • Thermal Shutdown
  • I2C Compatible Interface
  • EEPROM Memory
  • 6-mm × 6-mm × 1-mm 40-Pin VQFN Package
  • Enable / Disable
    • TPS65177: VI power cycle
    • TPS65177A: VI power cycle or EN-pin
  • 8.6-V to 14.7-V Input Voltage Range
  • Non-Synchronous Boost Converter (V(AVDD))
    • Integrated Isolation Switch
    • 13.5-V to 19.8-V Output Voltage (I2C)
    • 15-V Default Output Voltage
    • 4.25-A Switch Current Limit (I2C)
    • High Voltage Stress Mode (I2C)
  • Synchronous Buck Converter (V(HAVDD))
    • 4.8-V to 11.1-V Output Voltage (I2C)
    • 7.5-V Default Output Voltage
    • 1.7-A Switch Current Limit
    • High Voltage Stress Mode (I2C)
  • Non-Synchronous Buck Converter (V(IO))
    • 2.2-V to 3.7-V Output Voltage (I2C)
    • 2.5-V Default Output Voltage
    • 3-A Switch Current Limit
  • Synchronous Buck Converter (V(CORE))
    • 0.8-V to 3.3-V Output Voltage (I2C)
    • 1-V Default Output Voltage
    • 2.5-A Switch Current Limit
  • Positive Charge-Pump Controller (V(GH))
    • 20-V to 40-V Output Voltage (I2C)
    • 28-V Default Output Voltage
    • Temp. Compensation Offset 0-V to 15-V (I2C)
    • 4-V Default Offset (28 V to 32 V)
  • Negative Charge-Pump Controller (V(GL))
    • –14.5-V to –5.5-V Output Voltage (I2C)
    • –7.9-V Default Output Voltage
  • Gate Pulse Modulation (GPM)
    • Down to 0-V, 5-V, 10-V or 15-V (I2C)
    • 0-V Default Discharge Voltage
  • Temperature Compensation for V(GH)
  • Thermal Shutdown
  • I2C Compatible Interface
  • EEPROM Memory
  • 6-mm × 6-mm × 1-mm 40-Pin VQFN Package

The TPS65177/A provides all supply rails needed by a GIP (Gate-in-Panel) or non-GIP TFT-LCD panel. All output voltages are I2C programmable.

V(IO) and V(CORE) for the T-CON, V(AVDD) and V(HAVDD) for the Source Driver and the Gamma Buffer, V(GH) and V(GL) for the Gate Driver or the Level Shifter. For use with non-GIP technology Gate Pulse Modulation (GPM) is implemented, for use with GIP technology the V(GH) rail can be temperature compensated. Furthermore a High Voltage Stress Mode (HVS) for V(AVDD) and V(HAVDD) and an integrated V(AVDD) Isolation Switch is implemented. V(CORE), V(HAVDD), V(GH), V(GL), GPM and the V(GH) temperature compensation can be enabled and disabled by I2C programming.

A single BOM (Bill of Materials) can cover several panel types and sizes whose desired output voltage levels can be programmed in production and stored in a non-volatile integrated memory.

The TPS65177/A provides all supply rails needed by a GIP (Gate-in-Panel) or non-GIP TFT-LCD panel. All output voltages are I2C programmable.

V(IO) and V(CORE) for the T-CON, V(AVDD) and V(HAVDD) for the Source Driver and the Gamma Buffer, V(GH) and V(GL) for the Gate Driver or the Level Shifter. For use with non-GIP technology Gate Pulse Modulation (GPM) is implemented, for use with GIP technology the V(GH) rail can be temperature compensated. Furthermore a High Voltage Stress Mode (HVS) for V(AVDD) and V(HAVDD) and an integrated V(AVDD) Isolation Switch is implemented. V(CORE), V(HAVDD), V(GH), V(GL), GPM and the V(GH) temperature compensation can be enabled and disabled by I2C programming.

A single BOM (Bill of Materials) can cover several panel types and sizes whose desired output voltage levels can be programmed in production and stored in a non-volatile integrated memory.

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技術文件

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類型 標題 日期
* Data sheet TPS65177/A Fully I2C Programmable 6-CH LCD Bias IC for all Size TV Including Gate Pulse Modulation datasheet (Rev. C) PDF | HTML 2016年 2月 17日
Application note Basic Calculation of a Boost Converter's Power Stage (Rev. D) PDF | HTML 2022年 10月 28日
Application note Understanding Undervoltage Lockout in Power Devices (Rev. A) 2018年 9月 19日
Selection guide Power Management Guide 2018 (Rev. R) 2018年 6月 25日
Application note Generation of a VCOM buffer input using PWM signal 2015年 12月 21日
Application note Basic Calculation of a Buck Converter's Power Stage (Rev. B) 2015年 8月 17日
Application note Minimizing Ringing at the Switch Node of a Boost Converter 2006年 9月 15日

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