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UCC27223

不推薦在新設計中採用

具有失效時間控制的高效預測同步降壓驅動器

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產品規格表
UCC27223 不建議用於新設計
此產品將繼續向現有客戶提供。新設計應考量替代產品。
open-in-new 比較替代產品
功能相同，但針腳輸出與所比較的裝置不同。
UCC27302A 現行 具有 5V UVLO、互鎖和啟用選項的 120V 4.5A 半橋式驅動器 More recent driver with integrated bootstrap diode, higher voltage rating, input interlock and smaller package options
UCC27311A 現行 具有 8V UVLO 和啟用選項的 120V 4.5A 半橋式驅動器 More recent driver with integrated bootstrap diode, higher voltage rating, input interlock and smaller package options

UCC27223

不推薦在新設計中採用
產品規格表 立即訂購

產品詳細資料

Bootstrap supply voltage (max) (V) 20 Power switch MOSFET Input supply voltage (min) (V) -0.3 Input supply voltage (max) (V) 20 Operating temperature range (°C) -40 to 105 Undervoltage lockout (typ) (V) 4 Rating Catalog Propagation delay time (µs) 0.06 Rise time (ns) 17 Fall time (ns) 17 Iq (mA) 220 Input threshold TTL Channel input logic TTL Switch node voltage (V) 0 Features Dead time control, Enable, Soft switching, Synchronous Rectification Driver configuration Inverting, Noninverting
Bootstrap supply voltage (max) (V) 20 Power switch MOSFET Input supply voltage (min) (V) -0.3 Input supply voltage (max) (V) 20 Operating temperature range (°C) -40 to 105 Undervoltage lockout (typ) (V) 4 Rating Catalog Propagation delay time (µs) 0.06 Rise time (ns) 17 Fall time (ns) 17 Iq (mA) 220 Input threshold TTL Channel input logic TTL Switch node voltage (V) 0 Features Dead time control, Enable, Soft switching, Synchronous Rectification Driver configuration Inverting, Noninverting
HTSSOP (PWP) 14 32 mm² (5 mm × 6.4 mm)
  • Maximizes Efficiency by Minimizing Body-Diode Conduction and Reverse Recovery Losses
  • Transparent Synchronous Buck Gate Drive Operation From the Single Ended PWM Input Signal
  • 12-V or 5-V Input Operation
  • 3.3-V Input Operation With Availability of 12-V Bus Bias
  • High-Side and Low-Side ±3-A Dual Drivers
  • On-Board 6.5-V Gate Drive Regulator
  • ±3-A TrueDrive™ Gate Drives for High Current Delivery at MOSFET Miller Thresholds
  • Automatically Adjusts for Changing Operating Conditions
  • Thermally Enhanced 14-Pin PowerPAD™ HTSSOP Package Minimizes Board Area and Junction Temperature Rise
  • APPLICATIONS
    • Multiphase Converters in Combination With the TPS40090
    • Non-Isolated 3.3-V, 5-V and 12-V Input dc-to-dc Converters for Processor Power, General Computer, Telecom and Datacom Applications

Predictive Gate Drive™ and PowerPAD™ are trademarks of Texas Instruments Incorporated.
  • Maximizes Efficiency by Minimizing Body-Diode Conduction and Reverse Recovery Losses
  • Transparent Synchronous Buck Gate Drive Operation From the Single Ended PWM Input Signal
  • 12-V or 5-V Input Operation
  • 3.3-V Input Operation With Availability of 12-V Bus Bias
  • High-Side and Low-Side ±3-A Dual Drivers
  • On-Board 6.5-V Gate Drive Regulator
  • ±3-A TrueDrive™ Gate Drives for High Current Delivery at MOSFET Miller Thresholds
  • Automatically Adjusts for Changing Operating Conditions
  • Thermally Enhanced 14-Pin PowerPAD™ HTSSOP Package Minimizes Board Area and Junction Temperature Rise
  • APPLICATIONS
    • Multiphase Converters in Combination With the TPS40090
    • Non-Isolated 3.3-V, 5-V and 12-V Input dc-to-dc Converters for Processor Power, General Computer, Telecom and Datacom Applications

Predictive Gate Drive™ and PowerPAD™ are trademarks of Texas Instruments Incorporated.

The UCC27223 is a high-speed synchronous buck drivers for today’s high-efficiency, lower-output voltage designs. Using Predictive Gate Drive™ (PGD) control technology, these drivers reduce diode conduction and reverse recovery losses in the synchronous rectifier MOSFET(s).

The UCC27223 includes an enable pin that controls the operation of both outputs. A logic latch is also included to keep both outputs low until the first PWM input pulse comes in. The RDS(on) of the SR pull-down sourcing device is also minimized for higher frequency operations.

This closed loop feedback system detects body-diode conduction, and adjusts deadtime delays to minimize the conduction time interval. This virtually eliminates body-diode conduction while adjusting for temperature, load- dependent delays, and for different MOSFETs. Precise gate timing at the nanosecond level reduces the reverse recovery time of the synchronous rectifier MOSFET body-diode, reducing reverse recovery losses seen in the main (high-side) MOSFET. The lower junction temperature in the low-side MOSFET increases product reliability. Since the power dissipation is minimized, a higher switching frequency can also be used, allowing for smaller component sizes.

The UCC27223 is offered in the thermally enhanced 14-pin PowerPAD™ package with 2°C/W jc.

The UCC27223 is a high-speed synchronous buck drivers for today’s high-efficiency, lower-output voltage designs. Using Predictive Gate Drive™ (PGD) control technology, these drivers reduce diode conduction and reverse recovery losses in the synchronous rectifier MOSFET(s).

The UCC27223 includes an enable pin that controls the operation of both outputs. A logic latch is also included to keep both outputs low until the first PWM input pulse comes in. The RDS(on) of the SR pull-down sourcing device is also minimized for higher frequency operations.

This closed loop feedback system detects body-diode conduction, and adjusts deadtime delays to minimize the conduction time interval. This virtually eliminates body-diode conduction while adjusting for temperature, load- dependent delays, and for different MOSFETs. Precise gate timing at the nanosecond level reduces the reverse recovery time of the synchronous rectifier MOSFET body-diode, reducing reverse recovery losses seen in the main (high-side) MOSFET. The lower junction temperature in the low-side MOSFET increases product reliability. Since the power dissipation is minimized, a higher switching frequency can also be used, allowing for smaller component sizes.

The UCC27223 is offered in the thermally enhanced 14-pin PowerPAD™ package with 2°C/W jc.
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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 High-Efficiency predictive synchronous buck driver - UCC27223 datasheet 2003/4/10

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