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半橋式驅動器

UCC27301A

現行

具有 8V UVLO、互鎖和啟用選項的 120V 4.5A 半橋式驅動器

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產品規格表

UCC27301A

現行
產品規格表 立即訂購

產品詳細資料

Bootstrap supply voltage (max) (V) 120 Power switch MOSFET Input supply voltage (min) (V) 8 Input supply voltage (max) (V) 17 Peak output current (A) 4.5 Operating temperature range (°C) -40 to 150 Undervoltage lockout (typ) (V) 8 Rating Catalog Propagation delay time (µs) 0.02 Rise time (ns) 7.2 Fall time (ns) 5.5 Iq (mA) 0.001 Input threshold TTL Channel input logic TTL Switch node voltage (V) -20 Features Enable, Integrated bootstrap diode, Interlock, Negative Voltage Handling on Input Driver configuration Dual, Noninverting, TTL compatible
Bootstrap supply voltage (max) (V) 120 Power switch MOSFET Input supply voltage (min) (V) 8 Input supply voltage (max) (V) 17 Peak output current (A) 4.5 Operating temperature range (°C) -40 to 150 Undervoltage lockout (typ) (V) 8 Rating Catalog Propagation delay time (µs) 0.02 Rise time (ns) 7.2 Fall time (ns) 5.5 Iq (mA) 0.001 Input threshold TTL Channel input logic TTL Switch node voltage (V) -20 Features Enable, Integrated bootstrap diode, Interlock, Negative Voltage Handling on Input Driver configuration Dual, Noninverting, TTL compatible
SOIC (D) 8 29.4 mm² (4.9 mm × 6 mm) VSON (DRC) 10 9 mm² (3 mm × 3 mm)
  • Drives two N-channel MOSFETs in half-bridge configuration
  • –40°C to +150°C junction temperature range
  • 120V abs max voltage on HB pin
  • 3.7A source, 4.5A sink output currents
  • 8V to 17V VDD operating range (20V abs max) with UVLO
  • –(28–VDD)V abs max negative transient tolerance on HS pin (<100ns pulse)
  • –10V to +20V abs max input pins tolerance, independent of supply voltage range (TTL compatible)
  • Switching parameters:
    • 20ns typical propagation delay times
    • 7.2ns rise and 5.5ns fall time with 1000pF load
    • 4ns typical delay matching
  • Integrated bootstrap diode
  • Input interlock
  • Enable/disable functionality with low current consumption (3µA typical) when disabled (DRC package only)
  • Drives two N-channel MOSFETs in half-bridge configuration
  • –40°C to +150°C junction temperature range
  • 120V abs max voltage on HB pin
  • 3.7A source, 4.5A sink output currents
  • 8V to 17V VDD operating range (20V abs max) with UVLO
  • –(28–VDD)V abs max negative transient tolerance on HS pin (<100ns pulse)
  • –10V to +20V abs max input pins tolerance, independent of supply voltage range (TTL compatible)
  • Switching parameters:
    • 20ns typical propagation delay times
    • 7.2ns rise and 5.5ns fall time with 1000pF load
    • 4ns typical delay matching
  • Integrated bootstrap diode
  • Input interlock
  • Enable/disable functionality with low current consumption (3µA typical) when disabled (DRC package only)

The UCC27301A is a robust gate driver designed to drive two N-channel MOSFETs in a half-bridge or synchronous buck configuration with an absolute maximum bootstrap voltage of 120V. Its 3.7A peak source and 4.5A peak sink current capability allows the UCC27301A to drive large power MOSFETs with minimized switching losses during the transition through the Miller Plateau. The switching node (HS pin) can handle negative transient voltage, which allows the high-side channel to be protected from inherent negative voltages caused by parasitic inductance and stray capacitance.

The inputs are independent of supply voltage and are able to withstand -10V and +20V absolute maximum ratings. The low-side and high-side gate drivers are matched to 4ns between the turn on and turn off of each other and are controlled throught the LI and HI input pins respectively. However, the input interlock logic will turn both driver outputs low whenever both LI and HI inputs are high at the same time. An on-chip 120V rated bootstrap diode eliminates the need to add discrete bootstrap diodes. Undervoltage lockout (UVLO) is provided for both the high-side and the low-side drivers which provides symmetric turn on and turn off behavior and forces the outputs low if the drive voltage is below the specified threshold.

The UCC27301A is a robust gate driver designed to drive two N-channel MOSFETs in a half-bridge or synchronous buck configuration with an absolute maximum bootstrap voltage of 120V. Its 3.7A peak source and 4.5A peak sink current capability allows the UCC27301A to drive large power MOSFETs with minimized switching losses during the transition through the Miller Plateau. The switching node (HS pin) can handle negative transient voltage, which allows the high-side channel to be protected from inherent negative voltages caused by parasitic inductance and stray capacitance.

The inputs are independent of supply voltage and are able to withstand -10V and +20V absolute maximum ratings. The low-side and high-side gate drivers are matched to 4ns between the turn on and turn off of each other and are controlled throught the LI and HI input pins respectively. However, the input interlock logic will turn both driver outputs low whenever both LI and HI inputs are high at the same time. An on-chip 120V rated bootstrap diode eliminates the need to add discrete bootstrap diodes. Undervoltage lockout (UVLO) is provided for both the high-side and the low-side drivers which provides symmetric turn on and turn off behavior and forces the outputs low if the drive voltage is below the specified threshold.
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UCC27302A 現行 具有 5V UVLO、互鎖和啟用選項的 120V 4.5A 半橋式驅動器 Pin-to-pin device with 5V UVLO

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 UCC27301A 120V, 3.7A/4.5A Half-Bridge Driver with 8V UVLO, Interlock and Enable datasheet PDF | HTML 2024/7/22
Product overview UCC272xx and UCC273xx: 120V Half-Bridge Gate Drivers for High-Powered Applications (Rev. A) PDF | HTML 2026/3/2
應用說明 Mapping Application Requirements with the 120V Halfbridge Gate Driver (Rev. A) PDF | HTML 2026/2/27
應用說明 External vs. Internal Bootstrap Diode: Tradeoffs and Considerations PDF | HTML 2026/1/5
應用說明 Applying Non-isolated Gate Drivers in Your Home Tool and Accessory Designs PDF | HTML 2025/5/16
應用說明 Using Half-Bridge Gate Driver to Achieve 100% Duty Cycle for High Side FET PDF | HTML 2024/3/25
應用說明 Challenges and Solutions for Half-Bridge Gate Drivers in Bidirectional DC-DC Converters PDF | HTML 2024/1/24
應用說明 How to Choose a Gate Driver for DC Motor Drives PDF | HTML 2023/10/5
應用說明 Bootstrap Circuitry Selection for Half Bridge Configurations (Rev. A) PDF | HTML 2023/9/8
應用說明 Comparative Analysis of Two Different Methods for Gate-Drive Current Boosting (Rev. A) PDF | HTML 2022/2/17
應用說明 Voltage Fed Full Bridge DC-DC & DC-AC Converter High-Freq Inverter Using C2000 (Rev. D) 2021/4/7
應用說明 Implementing High-Side Switches Using Half-Bridge Gate Drivers for 48-V Battery. 2020/5/12
Application brief External Gate Resistor Selection Guide (Rev. A) 2020/2/28
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 2020/2/28
Application brief Small Price Competitive 100-V Driver for 48-V BLDC Motor Drives 2019/10/22
應用說明 Maximizing DC/DC converter designs with UCC27282 2019/1/18
應用說明 UCC27282 Improving motor drive system robustness 2019/1/11

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UCC27288EVM — UCC27288 100-V、3-A、8-V UVLO 半橋閘極驅動器評估模組

UCC27288EVM 專為評估 UCC27288D 而設計，這是一款具備 2.5-A 峰值電流源和 3.5-A 峰值汲極電流能力的 100-V 半橋閘極驅動器。此 EVM 可做為驅動功率 MOSFET 的參考設計，驅動電壓高達 20-V。
使用指南: PDF
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模擬型號

UCC27301AQDDARQ1 PSpice Model

SLUM893.ZIP (28 KB) - PSpice 模型
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計算工具

SLURB12 — UCC272xx-UCC273xx Schematic Review Template

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SOIC (D) 8 Ultra Librarian
VSON (DRC) 10 Ultra Librarian
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