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UCC27301A

現行

120V 4.5A half-bridge driver with 8V UVLO, interlock, and enable options

產品詳細資料

Bootstrap supply voltage (max) (V) 120 Power switch MOSFET Input supply voltage (min) (V) 8 Input supply voltage (max) (V) 17 Peak output current (A) 4.5 Operating temperature range (°C) -40 to 150 Undervoltage lockout (typ) (V) 8 Rating Catalog Propagation delay time (µs) 0.02 Rise time (ns) 7.2 Fall time (ns) 5.5 Iq (mA) 0.001 Input threshold TTL Channel input logic TTL Switch node voltage (V) -20 Features Enable, Integrated bootstrap diode, Interlock, Negative Voltage Handling on Input Driver configuration Dual, Noninverting, TTL compatible
Bootstrap supply voltage (max) (V) 120 Power switch MOSFET Input supply voltage (min) (V) 8 Input supply voltage (max) (V) 17 Peak output current (A) 4.5 Operating temperature range (°C) -40 to 150 Undervoltage lockout (typ) (V) 8 Rating Catalog Propagation delay time (µs) 0.02 Rise time (ns) 7.2 Fall time (ns) 5.5 Iq (mA) 0.001 Input threshold TTL Channel input logic TTL Switch node voltage (V) -20 Features Enable, Integrated bootstrap diode, Interlock, Negative Voltage Handling on Input Driver configuration Dual, Noninverting, TTL compatible
SOIC (D) 8 29.4 mm² 4.9 x 6 VSON (DRC) 10 9 mm² 3 x 3
  • Drives two N-channel MOSFETs in half-bridge configuration
  • –40°C to +150°C junction temperature range
  • 120V abs max voltage on HB pin
  • 3.7A source, 4.5A sink output currents
  • 8V to 17V VDD operating range (20V abs max) with UVLO
  • –(28–VDD)V abs max negative transient tolerance on HS pin (<100ns pulse)
  • –10V to +20V abs max input pins tolerance, independent of supply voltage range (TTL compatible)
  • Switching parameters:
    • 20ns typical propagation delay times
    • 7.2ns rise and 5.5ns fall time with 1000pF load
    • 4ns typical delay matching
  • Integrated bootstrap diode
  • Input interlock
  • Enable/disable functionality with low current consumption (3µA typical) when disabled (DRC package only)
  • Drives two N-channel MOSFETs in half-bridge configuration
  • –40°C to +150°C junction temperature range
  • 120V abs max voltage on HB pin
  • 3.7A source, 4.5A sink output currents
  • 8V to 17V VDD operating range (20V abs max) with UVLO
  • –(28–VDD)V abs max negative transient tolerance on HS pin (<100ns pulse)
  • –10V to +20V abs max input pins tolerance, independent of supply voltage range (TTL compatible)
  • Switching parameters:
    • 20ns typical propagation delay times
    • 7.2ns rise and 5.5ns fall time with 1000pF load
    • 4ns typical delay matching
  • Integrated bootstrap diode
  • Input interlock
  • Enable/disable functionality with low current consumption (3µA typical) when disabled (DRC package only)

The UCC27301A is a robust gate driver designed to drive two N-channel MOSFETs in a half-bridge or synchronous buck configuration with an absolute maximum bootstrap voltage of 120V. Its 3.7A peak source and 4.5A peak sink current capability allows the UCC27301A to drive large power MOSFETs with minimized switching losses during the transition through the Miller Plateau. The switching node (HS pin) can handle negative transient voltage, which allows the high-side channel to be protected from inherent negative voltages caused by parasitic inductance and stray capacitance.

The inputs are independent of supply voltage and are able to withstand -10V and +20V absolute maximum ratings. The low-side and high-side gate drivers are matched to 4ns between the turn on and turn off of each other and are controlled throught the LI and HI input pins respectively. However, the input interlock logic will turn both driver outputs low whenever both LI and HI inputs are high at the same time. An on-chip 120V rated bootstrap diode eliminates the need to add discrete bootstrap diodes. Undervoltage lockout (UVLO) is provided for both the high-side and the low-side drivers which provides symmetric turn on and turn off behavior and forces the outputs low if the drive voltage is below the specified threshold.

The UCC27301A is a robust gate driver designed to drive two N-channel MOSFETs in a half-bridge or synchronous buck configuration with an absolute maximum bootstrap voltage of 120V. Its 3.7A peak source and 4.5A peak sink current capability allows the UCC27301A to drive large power MOSFETs with minimized switching losses during the transition through the Miller Plateau. The switching node (HS pin) can handle negative transient voltage, which allows the high-side channel to be protected from inherent negative voltages caused by parasitic inductance and stray capacitance.

The inputs are independent of supply voltage and are able to withstand -10V and +20V absolute maximum ratings. The low-side and high-side gate drivers are matched to 4ns between the turn on and turn off of each other and are controlled throught the LI and HI input pins respectively. However, the input interlock logic will turn both driver outputs low whenever both LI and HI inputs are high at the same time. An on-chip 120V rated bootstrap diode eliminates the need to add discrete bootstrap diodes. Undervoltage lockout (UVLO) is provided for both the high-side and the low-side drivers which provides symmetric turn on and turn off behavior and forces the outputs low if the drive voltage is below the specified threshold.

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類型 標題 日期
* Data sheet UCC27301A 120V, 3.7A/4.5A Half-Bridge Driver with 8V UVLO, Interlock and Enable datasheet PDF | HTML 2024年 7月 22日
Product overview UCC272xx and UCC273xx: 120V Half-Bridge Gate Drivers for High-Powered Applications PDF | HTML 2025年 7月 31日
Application note Applying Non-isolated Gate Drivers in Your Home Tool and Accessory Designs PDF | HTML 2025年 5月 16日
Application note Mapping Application Requirements with the 120V Halfbridge Gate Driver PDF | HTML 2025年 4月 4日
Application note Using Half-Bridge Gate Driver to Achieve 100% Duty Cycle for High Side FET PDF | HTML 2024年 3月 25日
Application note Challenges and Solutions for Half-Bridge Gate Drivers in Bidirectional DC-DC Converters PDF | HTML 2024年 1月 24日
Application note How to Choose a Gate Driver for DC Motor Drives PDF | HTML 2023年 10月 5日
Application note Bootstrap Circuitry Selection for Half Bridge Configurations (Rev. A) PDF | HTML 2023年 9月 8日
Application note Comparative Analysis of Two Different Methods for Gate-Drive Current Boosting (Rev. A) PDF | HTML 2022年 2月 17日
Application note Voltage Fed Full Bridge DC-DC & DC-AC Converter High-Freq Inverter Using C2000 (Rev. D) 2021年 4月 7日
Application note Implementing High-Side Switches Using Half-Bridge Gate Drivers for 48-V Battery. 2020年 5月 12日
Application brief External Gate Resistor Selection Guide (Rev. A) 2020年 2月 28日
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 2020年 2月 28日
Application brief Small Price Competitive 100-V Driver for 48-V BLDC Motor Drives 2019年 10月 22日
Application note Maximizing DC/DC converter designs with UCC27282 2019年 1月 18日
Application note UCC27282 Improving motor drive system robustness 2019年 1月 11日

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使用指南: PDF
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使用指南: PDF
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