SPRUJB3 March 2024 AM67 , AM67A , TDA4AEN-Q1 , TDA4VEN-Q1
Module Instance | Source | Description |
---|---|---|
oldi_tx_core0 | PSC0 | oldi_tx_core0 reset |
oldi_tx_core1 | PSC0 | oldi_tx_core1 reset |
Module Instance | Module Clock Input | Source Clock | Source Control Register | Description |
---|---|---|---|---|
oldi_tx_core0 | OLDI_0_FWD_P_CLK | MAIN_PLL16_HSDIV0_CLKOUT | ||
MAIN_PLL16_HSDIV0_CLKOUT | ||||
OLDI_1_FWD_P_CLK | MAIN_TIEOFF0 | |||
OLDI_PLL_CLK | MAIN_PLL16_HSDIV0_CLKOUT | |||
MAIN_PLL16_HSDIV0_CLKOUT | ||||
oldi_tx_core1 | OLDI_0_FWD_P_CLK | MAIN_PLL16_HSDIV0_CLKOUT | OLDI1_CLKSEL[0:0] | |
MAIN_PLL16_HSDIV0_CLKOUT | OLDI1_CLKSEL[0:0] | |||
MAIN_PLL18_HSDIV0_CLKOUT | OLDI1_CLKSEL[0:0] | |||
DSS1_DISPC0_CLKSEL[0:0] | ||||
DSS1_DISPC0_CLKSEL[16:16] | ||||
MAIN_PLL17_HSDIV0_CLKOUT | OLDI1_CLKSEL[0:0] | |||
DSS1_DISPC0_CLKSEL[0:0] | ||||
DSS1_DISPC0_CLKSEL[16:16] | ||||
VOUT_EXTPCLKIN | OLDI1_CLKSEL[0:0] | |||
DSS1_DISPC0_CLKSEL[0:0] | ||||
OLDI_1_FWD_P_CLK | MAIN_TIEOFF0 | |||
OLDI_PLL_CLK | MAIN_PLL16_HSDIV0_CLKOUT | OLDI1_CLKSEL[0:0] | ||
MAIN_PLL16_HSDIV0_CLKOUT | OLDI1_CLKSEL[0:0] | |||
MAIN_PLL18_HSDIV0_CLKOUT | OLDI1_CLKSEL[0:0] |