SWRS201C January   2017  – March 2025 CC2640R2F-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Functional Block Diagram
  6. 5 Device Comparison
    1. 5.1 Related Products
  7. 6 Pin Configuration and Functions
    1. 6.1 Pin Diagram—RGZ Package
    2. 6.2 Signal Descriptions—RGZ Package
    3. 6.3 Wettable Flanks
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Power Consumption Summary
    5. 7.5  General Characteristics
    6. 7.6  1Mbps GFSK (Bluetooth Low Energy Technology)—RX
    7. 7.7  1Mbps GFSK (Bluetooth Low Energy Technology)—TX
    8. 7.8  24MHz Crystal Oscillator (XOSC_HF)
    9. 7.9  32.768kHz Crystal Oscillator (XOSC_LF)
    10. 7.10 48MHz RC Oscillator (RCOSC_HF)
    11. 7.11 32kHz RC Oscillator (RCOSC_LF)
    12. 7.12 ADC Characteristics
    13. 7.13 Temperature Sensor
    14. 7.14 Battery Monitor
    15. 7.15 Continuous Time Comparator
    16. 7.16 Low-Power Clocked Comparator
    17. 7.17 Programmable Current Source
    18. 7.18 Synchronous Serial Interface (SSI)
    19. 7.19 DC Characteristics
    20. 7.20 Thermal Resistance Characteristics for RGZ Package
    21. 7.21 Timing Requirements
    22. 7.22 Switching Characteristics
    23. 7.23 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1  Overview
    2. 8.2  Main CPU
    3. 8.3  RF Core
    4. 8.4  Sensor Controller
    5. 8.5  Memory
    6. 8.6  Debug
    7. 8.7  Power Management
    8. 8.8  Clock Systems
    9. 8.9  General Peripherals and Modules
    10. 8.10 System Architecture
  10. 9 Application, Implementation, and Layout
    1. 9.1 Application Information
    2. 9.2 7 × 7 Internal Differential (7ID) Application Circuit
      1. 9.2.1 Layout
  11. 10Device and Documentation Support
    1. 10.1 Device Nomenclature
    2. 10.2 Tools and Software
    3. 10.3 Documentation Support
    4. 10.4 Texas Instruments Low-Power RF Website
    5. 10.5 Support Resources
    6. 10.6 Trademarks
    7. 10.7 Electrostatic Discharge Caution
    8. 10.8 Export Control Notice
    9. 10.9 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Packaging Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGZ|48
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.12 ADC Characteristics

Tc = 25°C, VDDS = 3.0V without internal DC/DC converter and with voltage scaling enabled, unless otherwise noted.(1)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
Input voltage range0VDDSV
Resolution12Bits
Sample rate200ksps
OffsetInternal 4.3V equivalent reference(2)2LSB
Gain errorInternal 4.3V equivalent reference(2)2.4LSB
DNL(3)Differential nonlinearity>–1LSB
INL(4)Integral nonlinearity±3LSB
ENOBEffective number of bitsInternal 4.3V equivalent reference(2), 200ksps,
9.6kHz input tone		9.8Bits
VDDS as reference, 200ksps, 9.6kHz input tone10
Internal 1.44V reference, voltage scaling disabled,
32 samples average, 200ksps, 300Hz input tone		11.1
THDTotal harmonic distortionInternal 4.3V equivalent reference(2), 200ksps,
9.6kHz input tone		–65dB
VDDS as reference, 200ksps, 9.6kHz input tone–69
Internal 1.44V reference, voltage scaling disabled,
32 samples average, 200ksps, 300Hz input tone		–71
SINAD,
SNDR		Signal-to-noise
and
Distortion ratio		Internal 4.3V equivalent reference(2), 200ksps,
9.6kHz input tone		60dB
VDDS as reference, 200ksps, 9.6kHz input tone63
Internal 1.44V reference, voltage scaling disabled,
32 samples average, 200ksps, 300Hz input tone		69
SFDRSpurious-free dynamic rangeInternal 4.3V equivalent reference(2), 200ksps,
9.6kHz input tone		67dB
VDDS as reference, 200ksps, 9.6kHz input tone72
Internal 1.44V reference, voltage scaling disabled,
32 samples average, 200ksps, 300Hz input tone		73
Conversion timeSerial conversion, time-to-output, 24MHz clock50clock-cycles
Current consumptionInternal 4.3V equivalent reference(2)0.66mA
Current consumptionVDDS as reference0.75mA
Reference voltageEquivalent fixed internal reference (input voltage scaling enabled). For best accuracy, the ADC conversion should be initiated through the TI-RTOS API to include the gain/offset compensation factors stored in FCFG1.4.3(2)(5)V
Reference voltageFixed internal reference (input-voltage scaling disabled). For the best accuracy, the ADC conversion should be initiated through the TI-RTOS API to include the gain/offset compensation factors stored in FCFG1. This value is derived from the scaled value (4.3V) as follows.
Vref = 4.3V × 1408 / 4095		1.48V
Reference voltageVDDS as reference (also known as RELATIVE) (input voltage scaling enabled)VDDSV
Reference voltageVDDS as reference (also known as RELATIVE) (input voltage scaling disabled)VDDS / 2.82(5)V
Input Impedance200ksps, voltage scaling enabled. Capacitive input, input impedance depends on sampling frequency and sampling time>1MΩ
(1) Using IEEE Std 1241™-2010 for terminology and test methods.
(2) Input signal scaled down internally before conversion, as if voltage range was 0V to 4.3V.
(3) No missing codes. Positive DNL typically varies from +0.3 to +3.5, depending on the device (see Figure 7-21).
(4) For a typical example, see Figure 7-22.
(5) Applied voltage must be within absolute maximum ratings at all times (see Section 7.1).