SLOSE70 December 2020 DRV8434S
If the winding current in any coil drops below the open load current threshold (IOL) and the ITRIP level set by the indexer, and if this condition persists for more than the open load detection time (tOL), an open-load condition is detected. The EN_OL bit must be '1' to enable open load detection.
When an open load fault is detected, the OL and FAULT bits are latched high in the SPI register and the nFAULT pin is driven low. If the OL_A bit is high, it indicates an open load fault in winding A, between AOUT1 and AOUT2. Similarly, an open load fault between BOUT1 and BOUT2 causes the OL_B bit to go high.
When the OL_MODE bit is '1', the nFAULT line is released immediately after an open load condition is removed. When the OL_MODE bit is '0', the nFAULT line is released after an open load condition is removed and a clear faults command is issued either via the CLR_FLT bit or an nSLEEP reset pulse. The fault also clears when the device is power cycled or comes out of sleep mode.