SLOSE70 December   2020

PRODUCTION DATA

1. Features
2. Applications
3. Description
4. Revision History
5. Pin Configuration and Functions
6. Specifications
7. Detailed Description
1. 7.1 Overview
2. 7.2 Functional Block Diagram
3. 7.3 Feature Description
1. 7.3.1  Stepper Motor Driver Current Ratings
2. 7.3.2  PWM Motor Drivers
3. 7.3.3  Microstepping Indexer
4. 7.3.4  Controlling VREF with an MCU DAC
5. 7.3.5  Current Regulation
6. 7.3.6  Decay Modes
7. 7.3.7  PWM OFF Time
8. 7.3.8  Blanking time
9. 7.3.9  Charge Pump
10. 7.3.10 Linear Voltage Regulators
11. 7.3.11 Logic Level, tri-level and quad-level Pin Diagrams
12. 7.3.12 Protection Circuits
4. 7.4 Device Functional Modes
5. 7.5 Programming
6. 7.6 Register Maps
8. Application and Implementation
1. 8.1 Application Information
2. 8.2 Typical Application
1. 8.2.1 Design Requirements
2. 8.2.2 Detailed Design Procedure
9. Power Supply Recommendations
10. 10Layout
1. 10.1 Layout Guidelines
11. 11Device and Documentation Support
12. 12Mechanical, Packaging, and Orderable Information

#### Package Options

• RGE|24
• PWP|28
• RGE|24
##### 8.2.2.5.6 Device Junction Temperature Estimation

For an ambient temperature of TA and total power dissipation (PTOT), the junction temperature (TJ) is calculated as -

TJ = TA + (PTOT x RθJA)

Considering a JEDEC standard 4-layer PCB, the junction-to-ambient thermal resistance (RθJA) is 29.7 °C/W for the HTSSOP package and 39 °C/W for the VQFN package.

Assuming 25°C ambient temperature, the junction temperature for the HTSSOP package is calculated as shown below -

Equation 15. TJ = 25°C + (1.64-W x 29.7°C/W) = 73.71°C

The junction temperature for the VQFN package is calculated as shown below -

Equation 15. TJ = 25°C + (1.64-W x 39°C/W) = 88.96 °C