SLOSE70 December   2020

PRODUCTION DATA

1. Features
2. Applications
3. Description
4. Revision History
5. Pin Configuration and Functions
6. Specifications
7. Detailed Description
1. 7.1 Overview
2. 7.2 Functional Block Diagram
3. 7.3 Feature Description
1. 7.3.1  Stepper Motor Driver Current Ratings
2. 7.3.2  PWM Motor Drivers
3. 7.3.3  Microstepping Indexer
4. 7.3.4  Controlling VREF with an MCU DAC
5. 7.3.5  Current Regulation
6. 7.3.6  Decay Modes
7. 7.3.7  PWM OFF Time
8. 7.3.8  Blanking time
9. 7.3.9  Charge Pump
10. 7.3.10 Linear Voltage Regulators
11. 7.3.11 Logic Level, tri-level and quad-level Pin Diagrams
12. 7.3.12 Protection Circuits
4. 7.4 Device Functional Modes
5. 7.5 Programming
6. 7.6 Register Maps
8. Application and Implementation
1. 8.1 Application Information
2. 8.2 Typical Application
1. 8.2.1 Design Requirements
2. 8.2.2 Detailed Design Procedure
9. Power Supply Recommendations
10. 10Layout
1. 10.1 Layout Guidelines
11. 11Device and Documentation Support
12. 12Mechanical, Packaging, and Orderable Information

#### Package Options

• RGE|24
• PWP|28
• RGE|24
##### 8.2.2.5.2 Conduction Loss

The current path for a motor connected in full-bridge is through the high-side FET of one half-bridge and low-side FET of the other half-bridge. The conduction loss (PCOND) depends on the motor rms current (IRMS) and high-side (RDS(ONH)) and low-side (RDS(ONL)) on-state resistances as shown in Equation 4.

Equation 4. PCOND = 2 x (IRMS)2 x (RDS(ONH) + RDS(ONL))

The conduction loss for the typical application shown in Table 8-1 is calculated in Equation 5.

Equation 5. PCOND = 2 x (IRMS)2 x (RDS(ONH) + RDS(ONL)) = 2 x (2-A / √2)2 x (0.165-Ω + 0.165-Ω) = 1.32-W
Note:

This power calculation is highly dependent on the device temperature which significantly effects the high-side and low-side on-resistance of the FETs. For more accurate calculation, consider the dependency of on-resistance of FETs with device temperature.