SNOS641I October   1999  – July 2025 LM4041-N , LM4041-N-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
    1.     Pin Functions
    2.     Pin Functions: ADJ Pinouts
  6. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  LM4041-N LM4041-N-Q1 1.2 Electrical Characteristics (Industrial Temperature Range)
    6. 5.6  LM4041-N LM4041-N-Q1 1.2 Electrical Characteristics (Industrial Temperature Range)
    7. 5.7  LM4041-N LM4041-N-Q1 1.2 Electrical Characteristics (Extended Temperature Range)
    8. 5.8  LM4041-N LM4041-N-Q1 ADJ (Adjustable) Electrical Characteristics (Industrial Temperature Range)
    9. 5.9  LM4041-N LM4041-N-Q1 ADJ (Adjustable) Electrical Characteristics (Extended Temperature Range)
    10. 5.10 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Shunt Regulator
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Adjustable Shunt Regulator
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detail Design Procedure
      3. 8.2.3 Bounded Amplifier
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detail Design Procedure
        3. 8.2.3.3 Application Curve
      4. 8.2.4 Voltage Level Detector
        1. 8.2.4.1 Design Procedure
        2. 8.2.4.2 Detail Design Procedure
      5. 8.2.5 Precision Current Sink and Source
        1. 8.2.5.1 Design Requirements
        2. 8.2.5.2 Detailed Design Procedure
      6. 8.2.6 100mA Current Source
        1. 8.2.6.1 Design Requirements
        2. 8.2.6.2 Detailed Design Procedure
      7. 8.2.7 LM4041 in Clamp Circuits
        1. 8.2.7.1 Design Requirements
        2. 8.2.7.2 Detailed Design Procedure
      8. 8.2.8 Floating Current Detector
        1. 8.2.8.1 Design Requirement
        2. 8.2.8.2 Detailed Design Procedure
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Application Information

The LM4041-NLM4041-N-Q1 is a precision micro-power curvature-corrected band gap shunt voltage reference. For space-critical applications, the LM4041-NLM4041-N-Q1 is available in the sub-miniature SOT-23 and SC70 surface-mount package. The LM4041-NLM4041-N-Q1 has been designed for stable operation without the need of an external capacitor connected between the + pin and the – pin. If, however, a bypass capacitor is used, the LM4041-NLM4041-N-Q1 remains stable. Design effort is further reduced with the choice of either a fixed 1.2V or an adjustable reverse breakdown voltage. The minimum operating current is 60μA for the LM4041-NLM4041-N-Q1 1.2V and the LM4041-NLM4041-N-Q1 ADJ. Both versions have a maximum operating current of 12mA.

The LM4041-NLM4041-N-Q1 devices using the SOT-23 package have pin 3 connected as the (–) output through the die attach interface of the package. Therefore, pin 3 of the LM4041-NLM4041-N-Q1 1.2 must be left floating or connected to pin 2 and pin 3 of the LM4041-NLM4041-N-Q1 ADJ pin out.

The LM4041-NLM4041-N-Q1 devices using the SC70 package have pin 2 connected as the (–) output through the die attach interface of the package. Therefore, the LM4041-NLM4041-N-Q1 pin 2 of the LM4041-NLM4041-N-Q1 1.2 must be left floating or connected to pin 1, and the pin 2 of the LM4041-NLM4041-N-Q1 ADJ is the (–) output.

The typical thermal hysteresis specification is defined as the change in 25°C voltage measured after thermal cycling. The device is thermal cycled to temperature –40°C and then measured at +25°C. Next the device is thermal cycled to temperature 125°C and again measured at 25°C. The resulting VOUT delta shift between the 25°C measurements is thermal hysteresis. Thermal hysteresis is common in precision references and is induced by thermal-mechanical package stress. Changes in environmental storage temperature, operating temperature and board mounting temperature are all factors that can contribute to thermal hysteresis.

In a conventional shunt regulator application (Figure 8-1), an external series resistor (RS) is connected between the supply voltage and the LM4041-NLM4041-N-Q1. RS determines the current that flows through the load (IL) and the LM4041-NLM4041-N-Q1 (IQ). Because load current and supply voltage can vary, RS must be small enough to supply at least the minimum acceptable IQ to the LM4041-NLM4041-N-Q1 even when the supply voltage is at the minimum and the load current is at the maximum value. When the supply voltage is at the maximum and IL is at the minimum, RS must be large enough so that the current flowing through the LM4041-N is less than 12mA.

RS must be selected based on the supply voltage, (VS), the desired load and operating current, (IL and IQ), and the reverse breakdown voltage of the LM4041-NLM4041-N-Q1, VR.

Equation 1. LM4041-N  LM4041-N-Q1

The output voltage of the LM4041-NLM4041-N-Q1 SDJ can be adjusted to any value in the range of 1.24V through 10V. The output voltage is a function of the internal reference voltage (VREF) and the ratio of the external feedback resistors as shown in Figure 8-3 . The output voltage is found using Equation 2.

Equation 2. VO = VREF[(R2/R1) + 1]

where

  • VO is the output voltage.

The actual value of the internal VREF is a function of VO. The corrected VREF is determined by Equation 3.

Equation 3. VREF = ΔVO (ΔVREF/ΔVO) + VY

where

  • VY = 1.240V
  • and ΔVO = (VO − VY)

ΔVREF/ΔVO is found in the electrical characteristics tables in the Section 5 and is typically −1.55mV/V. You can get a more accurate indication of the output voltage by replacing the value of VREF in Equation 2 with the value found using Equation 3.

Note:

The actual output voltage can deviate from that predicted using the typical value of
ΔVREF / ΔVO in Equation 3. For C-grade parts, the worst-case ΔVREF / ΔVO is −2.5mV/V. For D-grade parts, the worst-case ΔVREF / ΔVO is −3.0mV/V.