SNVSCF2 November   2025 LM65680

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Related Products
  6. 5 Pin Configuration and Functions
    1. 5.1 Wettable Flanks
    2. 5.2 Pinout Design for Clearance and FMEA
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Descriptions
      1. 7.3.1  Input Voltage Range (VIN1, VIN2)
      2. 7.3.2  High-Voltage Bias Supply Subregulator (VCC, BIAS)
      3. 7.3.3  Precision Enable and Adjustable Input Voltage UVLO (EN/UVLO)
      4. 7.3.4  Output Voltage Setpoint (FB, BIAS)
      5. 7.3.5  Switching Frequency (RT)
      6. 7.3.6  Mode Selection and Clock Synchronization (MODE/SYNC)
        1. 7.3.6.1 Clock Synchronization
        2. 7.3.6.2 Clock Locking
      7. 7.3.7  Device Configuration (CNFG/SYNCOUT)
      8. 7.3.8  Dual-Random Spread Spectrum (DRSS)
      9. 7.3.9  High-Side MOSFET Gate Drive (BST)
      10. 7.3.10 Configurable Soft Start (SS)
        1. 7.3.10.1 Recovery From Dropout
      11. 7.3.11 Protection Features
        1. 7.3.11.1 Power-Good Monitor (PG)
        2. 7.3.11.2 Overcurrent and Short-Circuit Protection
        3. 7.3.11.3 Hiccup-Mode Protection
        4. 7.3.11.4 Thermal Shutdown
      12. 7.3.12 Two-Phase, Single-Output Operation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Active Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Power Train Components
        1. 8.1.1.1 Buck Inductor
        2. 8.1.1.2 Output Capacitors
        3. 8.1.1.3 Input Capacitors
        4. 8.1.1.4 EMI Filter
      2. 8.1.2 Error Amplifier and Compensation
      3. 8.1.3 Maximum Ambient Temperature
        1. 8.1.3.1 Derating Curves
    2. 8.2 Typical Applications
      1. 8.2.1 Design 1 – 5V, 8A Synchronous Buck Regulator With Wide Input Voltage Range and High Efficiency
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Custom Design With WEBENCH® Tools
          2. 8.2.1.2.2  Choosing the Switching Frequency
          3. 8.2.1.2.3  Buck Inductor Selection
          4. 8.2.1.2.4  Input Capacitor Selection
          5. 8.2.1.2.5  Output Capacitors
          6. 8.2.1.2.6  Output Voltage Setpoint
          7. 8.2.1.2.7  Compensation Components
          8. 8.2.1.2.8  Setting the Input Voltage UVLO
          9. 8.2.1.2.9  EMI Mitigation, RDRSS
          10. 8.2.1.2.10 Bootstrap Capacitor, CBST
        3. 8.2.1.3 Application Curves
      2.      Design 2 – High Efficiency, 48V to 12V, 400kHz Synchronous Buck Regulator
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Buck Inductor Selection
          2. 8.2.2.2.2 Input Capacitor Selection
          3. 8.2.2.2.3 Output Capacitors
          4. 8.2.2.2.4 Output Voltage Setpoint
          5. 8.2.2.2.5 Compensation Components
          6. 8.2.2.2.6 Feedforward Capacitor
          7. 8.2.2.2.7 Soft-Start Capacitor
        3. 8.2.2.3 Application Curves
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Thermal Design and Layout
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
      2. 9.1.2 Development Support
        1. 9.1.2.1 Custom Design With WEBENCH® Tools
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
        1. 9.2.1.1 Low-EMI Design Resources
        2. 9.2.1.2 Thermal Design Resources
        3. 9.2.1.3 Multiphase Design Resources
        4. 9.2.1.4 PCB Layout Resources
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The LM65680/60/40 is a synchronous buck DC/DC converter offered from a family of devices with ZEN 1 technology designed for low EMI, high power density, and excellent conversion efficiency. Integrated power MOSFETs with low RDS(on) enable up to 8A of output current across a wide input voltage range of 3.5V to 65V.

Phase stackable with synchronized interleaving, the peak current-mode control architecture of the LM65680/60/40 supports accurate current sharing with paralleled phases for higher output currents. AUTO mode enables frequency foldback during light-load operation, giving high light-load efficiency and a no-load input current as low as 2.2µA, which extends operating run-time in battery-powered systems.

A high-side switch minimum on-time of 36ns facilitates large step-down ratios, enabling the direct conversion from 24V or 48V inputs to low-voltage rails for reduced system cost and complexity. The package has several NC pins between critical power pins, which improve the Failure Modes and Effects Analysis (FMEA) result.

Device Information
PART NUMBER PACKAGE(1) RATED CURRENT(2)
LM65680 RZY
(WQFN-FCRLF, 26)		 8A
LM65660(3) 6A
LM65640(3) 4A
(1) For more information, see Section 11.
(2) See the Related Products table.
(3) Preview information (not Production Data).
LM65680 Typical SchematicTypical Schematic
LM65680 LM65680 Efficiency, VOUT = 12V, FSW = 400kHzLM65680 Efficiency, VOUT = 12V, FSW = 400kHz

The LM65680/60/40 includes several features to simplify compliance with CISPR 11 and CISPR 32 emissions requirements. First, a symmetrical pinout provides excellent input capacitor placement and enables an ultra-low effective value for the power-loop parasitic inductance, which reduces switching losses and improves EMI performance at high input voltage and high switching frequency. A pin-selectable switch-node slew-rate control feature further reduces emissions at high frequencies. To lower input capacitor ripple current and EMI filter size, interleaved operation using a SYNCOUT signal with 180° phase shift works well for cascaded, multichannel or multiphase designs. Resistor-adjustable switching frequency as high as 2.2MHz can be synchronized to an external clock source to eliminate beat frequencies in noise-sensitive applications. Finally, the LM65680/60/40 has dual-random spread spectrum (DRSS), a unique EMI-reduction feature that combines low-frequency triangular and high-frequency random modulations to mitigate disturbances across lower and higher frequency bands, respectively.

Additional features of the LM65680/60/40 include 150°C maximum junction temperature operation, open-drain power-good (PG) indicator for fault reporting and output voltage monitoring, precision enable input for input UVLO protection, monotonic start-up into prebiased loads, dual-input VCC bias subregulator powered from VIN or BIAS, hiccup-mode overload protection, and thermal shutdown protection with automatic recovery.

The LM65680/60/40 comes in a 4.5mm × 4.5mm, thermally enhanced, 26-pin eQFN package with additional pin clearance for increased reliability. Also included are wettable-flank pins to facilitate optical inspection during manufacturing. Leveraging a flip-chip routable leadframe (FCRLF) packaging technique, the LM65680/60/40 with useable current, lifetime reliability, and cost advantages targets applications requiring high power density. The wide input voltage range, low quiescent current consumption, high-temperature operation, cycle-by-cycle current limit, low EMI signature, and small design size provide an excellent point-of-load regulator design for applications requiring enhanced robustness and durability.