SBOS527G December 2010 – September 2025 TMP411-Q1 , TMP411D-Q1
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |||
|---|---|---|---|---|---|---|---|---|
| TEMPERATURE ERROR | ||||||||
| TERROR(LOCAL) | Local temperature sensor | TA = 15°C to 85°C V+ = 3.3V | –1 | ±0.0625 | 1 | °C | ||
| TA = –40°C to 125°C | –2.5 | ±1.25 | 2.5 | |||||
| TERROR(REMOTE) | Remote temperature sensor(1) | TA = 15°C to 75°C TDIODE = –40°C to 150°C V+ = 3.3V | –1 | ±0.0625 | 1 | °C | ||
| TA = –40°C to 100°C TDIODE = –40°C to 150°C V+ = 3.3V | –3 | ±1 | 3 | |||||
| TA = –40°C to 125°C TDIODE = –40°C to 150°C V+ = 3.3V | –5 | ±3 | 5 | |||||
| TERROR_PS | Temperature error power supply sensitivity (local and remote) | V+ = 2.7V to 5.5V TDIODE = –40°C to 150°C | –0.5 | ±0.2 | 0.5 | °C/V | ||
| TEMPERATURE MEASUREMENT | ||||||||
| tCONV | Conversion time (Local + Remote) | One-Shot mode | Legacy chip | 105 | 115 | 125 | ms | |
| New chip | 30 | 35 | 40 | |||||
| TRES | Resolution | Local temperature sensor (programmable) | 9 | 12 | Bits | |||
| Remote temperature sensor | 12 | |||||||
| RSERIES | Remote sensor source current | High | Series resistance: 3kΩ maximum | 120 | µA | |||
| Medium high | 60 | |||||||
| Medium low | Legacy chip only | 12 | ||||||
| Low | 6 | |||||||
| η | Remote transistor ideality factor | Optimized ideality factor | 1.008 | |||||
| SMBus INTERFACE | ||||||||
| VIH | Logic input high voltage (SCL, SDA) | 2.1 | V | |||||
| VIL | Logic input low voltage (SCL, SDA) | 0.8 | V | |||||
| VHYST | Hysteresis | 170 | mV | |||||
| SMBus output low sink current | 6 | mA | ||||||
| ILI and ILO | Logic input current | Legacy chip | –1 | 1 | µA | |||
| New chip | –0.2 | 0.2 | ||||||
| CIN | SMBus input capacitance (SCL, SDA) | 3 | pF | |||||
| SMBus clock frequency | 3.4 | MHz | ||||||
| SMBus timeout | 25 | 30 | 35 | ms | ||||
| SCL falling edge to SDA valid time | 1 | µs | ||||||
| DIGITAL OUTPUTS | ||||||||
| VOL | Output low voltage | IOUT = 6mA | Legacy chip | 0.15 | 0.4 | V | ||
| New chip | 0.3 | 0.4 | ||||||
| IOH | High-level output leakage current | VOUT = V+ | Legacy chip | 0.1 | 1 | µA | ||
| New chip | 0.05 | 0.2 | ||||||
| ALERT or THERM2 output low sink current | ALERT/THERM2 forced to 0.4V | 6 | mA | |||||
| THERM output low sink current | THERM forced to 0.4V | 6 | mA | |||||
| POWER SUPPLY | ||||||||
| V+ | Specific voltage range | 2.7 | 5.5 | V | ||||
| IDD_AVG | Quiescent current | 0.0625Hz conversion V+ = 3.3V | Legacy chip | 28 | 30 | µA | ||
| New chip | 1.5 | 8.2 | ||||||
| 8Hz conversion V+ = 3.3V | Legacy chip | 400 | 475 | |||||
| New chip | 45 | 85 | ||||||
| IDD_SD | Shutdown current | Serial bus inactive | Legacy chip | 3 | 10 | µA | ||
| New chip | 0.6 | 7 | ||||||
| Serial bus active, fs = 400kHz | Legacy chip | 90 | ||||||
| New chip | 7 | |||||||
| Serial bus active, fs = 3.4MHz | Legacy chip | 350 | ||||||
| New chip | 55 | |||||||
| Undervoltage lockout(2) | Legacy chip | 2.3 | 2.4 | 2.6 | V | |||
| This behavior is combined with Power-on-reset (POR). For more information, please see Section 7.3.6 and footnote(2) | New chip | |||||||
| POR | Power-on-reset threshold | Legacy chip | 1.6 | 2.3 | V | |||
| New chip | 1.23 | 1.4 | ||||||
| Brownout detect | New chip | 1 | 1.14 | V | ||||