SBOS527G December   2010  – September 2025 TMP411-Q1 , TMP411D-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics (TMP411-Q1)
    6. 6.6  Electrical Characteristics (TMP411D-Q1)
    7. 6.7  Timing Characteristics
    8. 6.8  Timing Diagrams
    9. 6.9  Typical Characteristics (TMP411-Q1)
    10. 6.10 Typical Characteristics (TMP411D-Q1)
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Series Resistance Cancellation
      2. 7.3.2 Differential Input Capacitance
      3. 7.3.3 Temperature Measurement Data
      4. 7.3.4 THERM (PIN 4) and ALERT/ THERM2 (PIN 6)
      5. 7.3.5 Sensor Fault
      6. 7.3.6 Undervoltage Lockout (TMP411-Q1 Only)
      7. 7.3.7 Filtering
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode (SD)
      2. 7.4.2 One-Shot Conversion
    5. 7.5 Programming
      1. 7.5.1  Serial Interface
      2. 7.5.2  Bus Overview
      3. 7.5.3  Timing Diagrams
      4. 7.5.4  Serial Bus Address
      5. 7.5.5  Read/Write Operations
      6. 7.5.6  Time-Out Function
      7. 7.5.7  High-Speed Mode
      8. 7.5.8  General-Call Reset
      9. 7.5.9  Software Reset
      10. 7.5.10 SMBUS Alert Function
  9. 8 Register Map
    1. 8.1  Register Information
    2. 8.2  Pointer Register
    3. 8.3  Temperature Registers
    4. 8.4  Limit Registers
    5. 8.5  Status Register
    6. 8.6  Configuration Register
    7. 8.7  Resolution Register
    8. 8.8  Conversion Rate Register
    9. 8.9  N-factor Correction Register
    10. 8.10 Minimum and Maximum Registers
    11. 8.11 Consecutive Alert Register
    12. 8.12 THERM Hysteresis Register
    13. 8.13 Identification Registers
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Revision History

Changes from Revision F (November 2013) to Revision G (September 2025)

  • Added the TMP411D-Q1 device throughout the document; updated the data sheet titleGo
  • Updated the look and feel of the document per the latest Texas Instruments and industry data sheet standardsGo
  • Added "Package Information" table to the Description sectionGo
  • Added "Device Comparison" table, "Device Nomenclature" figure and descriptionGo
  • Updated the "Conversion time" throughout the documentGo
  • Changed the Average and Shutdown currents throughout the documentGo
  • Added Pin Configurations and Functions sectionGo
  • Added "Type" column to Pin Functions tableGo
  • Updated the maximum voltage ratings on D+/D- pins.Go
  • Updated the maximum voltage rating on pins 4, 6, 7, 8.Go
  • Updated the maximum voltage rating on V+ pinGo
  • Updated Human body model (HBM) and Charged device model (CDM) Electrostatic discharge for TMP411-Q1Go
  • Added DGK and DDF packages Thermal Information sectionGo
  • Updated the typo and moved "TA = 15°C to 85°C, V+ = 3.3V" from Remote temperature error to Local temperature errorGo
  • Added "TDIODE = –40°C to 150°C" condition to temperature error power supply sensitivityGo
  • Added "Conversion time" for the New chip in Electrical Characteristics tableGo
  • Updated the typo for Hysteresis typical value from 500mV to 170mV.Go
  • Added "Logic input current" for the New chip in Electrical Characteristics table.Go
  • Added "Output low voltage" for the New chip in Electrical Characteristics tableGo
  • Added "High-level output leakage current" for the New chip in Electrical Characteristics table.Go
  • Updated the typo and added 6mA min to “ALERT or THERM2 output low sink current”Go
  • Added "Quiescent current" for the New chip and all test conditions in the Electrical Characteristics tableGo
  • Removed limitation on Undervoltage lockout.Go
  • Added "Power-on-reset threshold" for the new chip in the Electrical Characteristics table.Go
  • Added Brownout detect value in the Electrical Characteristics tableGo
  • Changed t(SUDAT) in High-Speed Mode from 10ns to 20ns.Go
  • Added "Typical Characteristics (TMP411-Q1)" graphs for the New chipGo
  • Added an overview in the Detailed Description sectionGo
  • Updated the Basic Connections figure in the Overview sectionGo
  • Added Functional Block Diagram sectionGo
  • Added Feature Description section and relocated feature information to this sectionGo
  • Added "12-bit Q4 parameters and Bit values" tables along with its C code.Go
  • Updated the Undervoltage Lockout section due to Undervoltage Lockout voltage removal by POR in the New chipGo
  • Added Device Functional Modes sectionGo
  • Clarified the Shutdown Mode (SD) section to match actual silicon behaviorGo
  • Changed the terminology "Master" to "Controller" and "Slave" to "Target" throughout the documentGo
  • Added Timing Diagrams to the Specifications sectionGo
  • Added "TMP411-Q1 and TMP411D-Q1 Device Address Options" tableGo
  • Changed REGISTER INFORMATION section to Register Maps section and centralized register information in this sectionGo
  • Updated the Status Register section due to Undervoltage lockout voltage removal by POR in the New chipGo
  • Added "Application Information" sectionGo
  • Added D+ waveform in the Design Requirements sectionGo
  • Updated Detailed Design Procedure sectionGo
  • Added Power Supply Recommendations sectionGo
  • Changed from Layout Considerations to Layout Guidelines Go
  • Added "Layout Example" sectionGo
  • Added the Device and Documentation Support section and subsectionsGo
  • Added the Mechanical, packaging, and Orderable Information sectionGo

Changes from Revision E (December 2012) to Revision F (November 2013)

  • Updated the numbering format for tables, figures, and cross-references throughout the documentGo
  • Changed package throughout document from MSOP to VSSOP.Go
  • Changed device CDM ESD Classification Level from C3B to C4B in Section 1 list item and in the ABSOLUTE MAXIMUM RATINGS table.Go