SLVSDF3F MARCH 2017 – JANUARY 2019 TPSM846C23
The TPSM846C23 device also allows simple testing of the output-voltage margin, by applying a either a positive or negative offset to the feedback voltage. The STEP_VREF_MARGIN_HIGH (MFR_SPECIFIC_05) (D5h) and STEP_VREF_MARGIN_LOW (MFR_SPECIFIC_06) (D6h) commands control the size of the applied high offset or low offset (respectively). The adjustment range is from –64 × 1.953 mV to 31 × 1.953 mV from the nominal feedback voltage. The OPERATION command toggles the converter between the following three states:
Use Equation 4 to calculate the resulted internal-reference voltage.
The total adjustable range of the output voltage, including VOUT_COMMAND, MARGIN, and VREF_TRIM, is limited by the internal reference DAC range of 0.35 V – 1.65 V. For more information on the implementation, see the Supported PMBus Commands section.