SLVSDF3F MARCH 2017 – JANUARY 2019 TPSM846C23
The SYNC pin is factory-configured as an input pin. When power is applied, if no external clocking signal is present on the SYNC pin, the device operates at the switching frequency set by the internal or an external timing resistor. If an external clock signal that meets the specification of the Synchronization section of Switching Characteristics is applied to the SYNC pin, the device synchronizes to the leading edge of the applied waveform. The rising edge of the PH node lags the rising edge of the clocking waveform by approximately 500 ns. The external clock must be a 50% duty-cycle square wave. The external-clock frequency must be with ±20% of the free-running frequency set by the RRT resistor. It is permissible for the SYNC signal to become active after the module has powered up. If this is done, there is a small disturbance in the output voltage while the module locks to the SYNC clock. If the SYNC signal is lost during operation, the module quickly detects the loss and reverts to switching at the frequency set by the RRT resistor. A disturbance occurs in the output voltage upon loss of SYNC.