SLVSDF3F MARCH 2017 – JANUARY 2019 TPSM846C23
These bits are output voltage overvoltage retry setting. The default for this bit is 111b.
|000||A zero value for the retry setting means that the unit does not attempt to restart. The output remains disabled until the fault is cleared (Refer to section 10.7 of the PMBus specification)|
|111||A one value for the retry setting means that the unit goes through a normal startup (Soft start) continuously, without limitation, until it is commanded off or bias power is removed or another fault condition causes the unit to shutdown.|
Any value other than 000 or 111 is not accepted. Attempting to write any other value is rejected, causing the device to assert SMBALERT along with the CML bit in STATUS_BYTE and the invalid data bit in STATUS_CML. Note: because all 3 bits must be the same, only one (bit 5) is stored in EEPROM.