SNAA421 November   2025 LMK05318B , LMK5B12204 , LMK5B33216 , LMK5B33414 , LMK5C33216A , LMK5C33414A

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Start Here: Using TICS Pro for Configuration and Readback
    1. 1.1 TICS Pro Status Page
    2. 1.2 TICS Pro Default Setting
  5. 2Debug Procedure: From Device Start-Up to Locked Output State
    1. 2.1 Is the APLL Reference Valid?
      1. 2.1.1 Check Status of APLL Reference
      2. 2.1.2 Debug APLL Reference
    2. 2.2 Is the APLL Locked?
      1. 2.2.1 Check Status of APLL Lock
      2. 2.2.2 Debug APLL Lock
    3. 2.3 Is the DPLL Reference Valid?
      1. 2.3.1 Check Status of DPLL Reference Validation
      2. 2.3.2 Debug DPLL Reference Validation
    4. 2.4 Is the DPLL Selecting a Reference?
      1. 2.4.1 Check Status of DPLL Reference Selection
      2. 2.4.2 Debug DPLL Reference Selection
    5. 2.5 Is the DPLL Frequency Locked?
      1. 2.5.1 Check Status of DPLL Frequency Lock
      2. 2.5.2 Debug DPLL Frequency Lock
    6. 2.6 Is the DPLL Phase Locked?
      1. 2.6.1 Check Status of DPLL Phase Lock
      2. 2.6.2 Debug DPLL Phase Lock
  6. 3Summary
  7. 4References

2.2.1 Check Status of APLL Lock

The LMK device has an APLLx lock detector that can determine the APLLx lock state through the "loss of lock APLLx" bit. The APLLx lock detector determines the lock state by a voltage threshold. This means the APLL lock status bit, as described in Table 2-13, can be cleared even though the APLL is not frequency locked. Refer toTable 2-23 for the loss of lock APLL status registers in the LMK device families.

Table 2-3 Loss of APLL Lock - Status Bit Definition
BIT STATE MEANING DESCRIPTION
0 Desired result The APLLx tuning voltage is within the internally defined tuning voltage threshold.
1 Undesired result The APLLx tuning voltage is outside the internally defined tuning voltage threshold.
Table 2-4 Loss of APLL Lock - Status Register
DEVICE FAMILY TICS PRO FIELD NAME LOSS OF LOCK APLL
REGISTER
BAW APLL(1) APLL2 APLL1
LMK05318B, LMK05318 LOL_PLLx N/A R13[3] N/A
LMK5B, LMK5CA, LMK5C LOL_PLLx N/A R33[2] R33[3](2)
(1) The loss of APLL lock status bit is not available and/or not recommended for use.
(2) Column is not applicable for LMK5B12212 or LMK5C22212A.

For APLLs that have a BAW VCO (VCBO), use the BAW frequency lock detector to check the APLL lock status. The BAW frequency lock detector determines APLL lock by a user-programmed frequency threshold (relative to the XO input frequency). Therefore, the BAW lock detector is more precise than the voltage-based APLL lock detector. Note that the BAW detector can report unlock when the DPLL is locked if the frequency error between the DPLL reference and APLL reference exceeds the BAW lock threshold. Refer to Table 2-22 for the status bit definition of the BAW detector and Table 2-12 for the registers to configure.

Table 2-5 BAW Frequency Lock Detect - Status Bit Definition
BIT STATE MEANING DESCRIPTION
0 Undesired result The BAW APLL reports frequency lock if the frequency error between the VCBO output and the XO input is within the BAW Frequency Lock Detect lock threshold.
1 Desired result The BAW APLL reports unlock while the frequency error exceeds the lock threshold and becomes unlocked when the frequency error exceeds the unlock threshold.
Table 2-6 BAW Frequency Lock Detect - Status and Threshold Registers
DEVICE FAMILY TICS PRO FIELD NAME BAW LOCK STATUS
REGISTER		 BAW LOCK ENABLE
REGISTER 		BAW LOCK - LOCK THRESHOLD
REGISTER(1)		 BAW LOCK - UNLOCK THRESHOLD
REGISTER(1)
LMK05318B, LMK05318 BAW_LOCK R80[7] R79[4] = 1 R80[6:0] to R81[7:0],
R82 to R85,
R86 to R89		 R90 to R91,
R92 to R95,
R96 to R99
LMK5B, LMK5CA, LMK5C LOFL_DPLL3 (APLL DLD) R36[6] R22[5] = 1 ,
R561[7] = 1(2),
R528[7] = 1		 R540 to R543,
R528[6:0] to R529		 R530 to R531
(1) Use TICS Pro Software to configure the lock and unlock threshold register settings.
(2) When R561[7] = 1, the R36[6] register reports the status of the BAW APLL digital lock detect (DLD), which is the BAW APLL frequency lock detector. When R561[7] = 0, the R36[6] register reports the status of the BAW DPLL DLD, which is the BAW DPLL loss of frequency lock detector. The APLL DLD is independent from the DPLL DLD.